EP0425764A2 - Système de commande de données d'entrée et appareil de gestion de données à y utiliser - Google Patents

Système de commande de données d'entrée et appareil de gestion de données à y utiliser Download PDF

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Publication number
EP0425764A2
EP0425764A2 EP90113707A EP90113707A EP0425764A2 EP 0425764 A2 EP0425764 A2 EP 0425764A2 EP 90113707 A EP90113707 A EP 90113707A EP 90113707 A EP90113707 A EP 90113707A EP 0425764 A2 EP0425764 A2 EP 0425764A2
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EP
European Patent Office
Prior art keywords
data
pointer
chain
supervision
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP90113707A
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German (de)
English (en)
Other versions
EP0425764A3 (en
Inventor
Iwato C/O Computer Seisakusho Furuse
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of EP0425764A2 publication Critical patent/EP0425764A2/fr
Publication of EP0425764A3 publication Critical patent/EP0425764A3/en
Withdrawn legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2205/00—Indexing scheme relating to group G06F5/00; Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F2205/06—Indexing scheme relating to groups G06F5/06 - G06F5/16
    • G06F2205/064—Linked list, i.e. structure using pointers, e.g. allowing non-contiguous address segments in one logical buffer or dynamic buffer space allocation

Definitions

  • the present invention is directed generally to an electronic computer system, and more particularly, to an input data control system employing a data I/O management program as well as to a data management apparatus for use with this control system.
  • Fig. 3 is a block diagram illustrating a prior art of this type of input data control system.
  • the numeral 1 represents a terminal of an IC card reader or a personal computer; and 2 denotes a host computer to which a plurality of terminals 1 are connectable.
  • Desig­nated at 3 is a data I/O management program executed by a central processing unit (CPU) incorporated into the host computer 2 and functioning as a part of an operating system (OS) for controlling and managing the entire electronic computer system.
  • Indicated at 4 is an input buffer provided as an input data storage region for temporarily storing input data sent from the terminal 1.
  • the input buffers are allocated by a predetermined capacity onto a main memory region within the host computer 2 per terminal.
  • the data transmitted from the terminal 1 concomitant severelyly with the occurrence of events is received by the data I/O management program 3 incorporated into the host computer 2, which program 3 in turn permits the input buffer 4 to un­conditionally store the received data and at the same moment permits some other program such as a corresponding applica­tion program to take over control.
  • the control reverts to the data I/O management program 3 which thereafter receives data transmitted from the terminal 1 concomitantly when a subsequent event takes place and permits the input buffer 4 to store the received data.
  • the prior art input data control system has the above-described arrangement, and hence the data stored in the input data storage region are processed by some other program.
  • the next data given from the terminal is not allowed to be received unless the former data has become unnecessary. For this reason, the efficiency at which the data are transmitted and received between the host computer and the terminal can not be improved.
  • an input data control system comprising: a plurality of input data storage regions; and management information storage regions for storing management information on input data stored in the input data storage regions as well as on the input data storage regions, characterized in that a data I/O management program permits the corresponding input data storage region to store the data from the terminal on the basis of the management information stored in the management information storage region and updates the corresponding management information.
  • a plurality of input data storage regions and management information storage regions are provided.
  • the input data storage regions are allocated per input data, thereby making it possible to continuously receive data from the terminal without waiting for the completion of processing of the data already inputted by use of other program.
  • data transmitting/receiving efficiency between the terminal and the host computer can be ameliorated.
  • FIG. 1 there is illustrated a block diagram of one embodiment of an input data control system of the invention.
  • the numeral 1 represents a terminal; and 2 denotes a host computer.
  • Designated at 3a is a data I/O management program for receiving the data transmitted from the terminal 1 on the basis of the input data control system and transmitting the data to the terminal 1.
  • the symbols 4a, 4b, 4c ... represent a plurality of input buffers (input data storage regions), provided on a main memory region, for respectively storing the data transmitted from the terminal 1 every time an event happens.
  • input data control tables (management informa­tion storage regions), provided to exhibit one-to-one corre­spondence with respect to the input buffers 4a, 4b, 4c for storing control information on the input buffers as well as on the input data stored therein.
  • the input data control tables 5a, 5b, 5c ... are provided for the occupied input buffers in which the input data have been stored and the process performed by another program is not yet finished.
  • Positional information (addresses) of the corresponding input buffers and lengths of the input data stored therein are set in these tables 5a, 5b, 5c ... Except in the case of the last table, positional information (an address) for the next table is set in the previous table to chain them in sequence to constitute an occupied table chain.
  • the input data control tables 6a, 6b, 6c ... are provided for vacant input buffers (including the unnecessary used-buffers in which the input data have already been processed by other program).
  • the positional information of the corresponding input buffers are set in these tables 6a, 6b, 6c ... Except in the case of the last table, positional information for the next table is set in the previous table to likewise chain them in sequence to constitute a vacant table chain.
  • a control table supervision table (a management information storage region) generally indicated at 7 serves to supervise the input data control tables 5a, 5b, 5c ... and 6a, 6b, 6c ...
  • the positional information of the top tables of the occupied input data control tables 5a, 5b, 5c ... and the vacant input data control tables 6a, 6b, 6c ... are set in the supervision table 7. Note that the foregoing individual tables (management information tables) are provided on the main memory region as in the case of the input buffers.
  • Fig. 2 is a flowchart showing processes when the data I/O management program 3a inputs the data transmitted from the terminal 1 on the basis of the present control system.
  • steps S1 and S2 are combined to form a process loop for the data from the ter­minal 1, wherein a terminal data receiving process (step S1) continues till the presence of the received data is detected from a judgment made in step S2.
  • the vacant input data control table 6a is secured (step S3) on the basis of the positional information stored in the supervision table 7, and the operation moves to step S4.
  • the received data are stored in the corresponding input buffers on the basis of positional information (addresses) of the input buffers which are included in the input data control table 6a secured in step S3.
  • next table positional information (an address) existing in the table 6a is set in the supervision table 7 as well as a length of the input data stored in the input data control table 6a.
  • the next table positional information stored in the table 6a is cleared.
  • the top input data control table 5a of the occupied tables is ensured (step S5) in accordance with the positional information stored in the supervision table 7.
  • a subsequent step is to judge whether or not an input data control table to be chained next is present on the basis of the existence or non-existence of the next table positional information stored therein (step S6). If such a table is present, the operation proceeds to step S7 where the input data control table chained is secured. Thereafter, the operation returns to step S6.
  • step S8 the positional information of the table secured in step S3 is set in the last input data control table of the occupied tables which has been searched in steps S6 and S7, and at the same time the fact that the input data exists in another corresponding program is conveyed.
  • the data transmitted from the terminal 1 concomitantly with the occurrence of the events are stored in the input buffer corresponding to the vacant input data control table per data.
  • This input data control table is chained to the last input data control table of the occupied tables, thereby making it possible to continuously receive plural pieces of data transmitted from the terminal 1 each time an event occurs, without waiting for the comple­tion of processing by another program. Besides, a data transmitting/receiving efficiency between the host computer 2 and the terminal 1 can be improved.
  • the data I/O output management program 3a secures the occupied input data control table 5a on the basis of the positional information stored in the supervision table 7 and permits another program to take over the input data stored in the corre­sponding input buffer 4a. Simultaneously, the program 3a functions to set the next table positional information in the supervision table 7 from the table 5a. The next table positional information stored in the table 5a is then cleared. The top input data control table 6a of the vacant tables is secured in accordance with the positional informa­tion set in the supervision table 7. As in steps S6 and S7 shown in Fig.
  • the above-described embodiment also exemplifies a system in which the input data control table is chained in the last position. Such a table may, however, be chained in the top position.
  • the input data control system includes: a plurality of input data storage regions; and management information storage regions for storing manage­ment information on the input data stored in the input data storage regions as well as on these input data storage regions.
  • the data I/O manage­ment program permits the corresponding input data storage region to store the data from the terminal on the basis of the management information stored in the management informa­tion storage region and updates the corresponding management information. It is therefore possible to continuously process the plural pieces of data transmitted from the terminal concomitantly with the occurrence of events and to improve data transmitting/receiving efficiency between the host computer and the terminal.

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer And Data Communications (AREA)
EP19900113707 1989-10-30 1990-07-17 Input data control system and data management apparatus for use therewith Withdrawn EP0425764A3 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP282323/89 1989-10-30
JP1282323A JPH03142648A (ja) 1989-10-30 1989-10-30 入力データ制御方式

Publications (2)

Publication Number Publication Date
EP0425764A2 true EP0425764A2 (fr) 1991-05-08
EP0425764A3 EP0425764A3 (en) 1992-09-30

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
EP19900113707 Withdrawn EP0425764A3 (en) 1989-10-30 1990-07-17 Input data control system and data management apparatus for use therewith

Country Status (3)

Country Link
EP (1) EP0425764A3 (fr)
JP (1) JPH03142648A (fr)
CA (1) CA2021266A1 (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0551191A1 (fr) * 1992-01-09 1993-07-14 Digital Equipment Corporation Méthode et appareil pour le transfert de données à et d'un système d'ordinateur hôte
US5440690A (en) * 1991-12-27 1995-08-08 Digital Equipment Corporation Network adapter for interrupting host computer system in the event the host device driver is in both transmit and receive sleep states

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0267974A1 (fr) * 1986-11-14 1988-05-25 International Business Machines Corporation Interface de commande pour le transfert de données entre une unité de traitement de données et des dispositifs entrée/sortie
US4881167A (en) * 1986-06-18 1989-11-14 Hitachi, Ltd. Data memory system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4881167A (en) * 1986-06-18 1989-11-14 Hitachi, Ltd. Data memory system
EP0267974A1 (fr) * 1986-11-14 1988-05-25 International Business Machines Corporation Interface de commande pour le transfert de données entre une unité de traitement de données et des dispositifs entrée/sortie

Non-Patent Citations (4)

* Cited by examiner, † Cited by third party
Title
A. LISTER 'Fundamentals of Operating Systems. Second Edition.' 1979 , MACMILLAN , LONDON *
ELECTRONIC DESIGN. vol. 34, no. 4, 20 February 1986, HASBROUCK HEIGHTS, NEW JERSEY M. BEEDIE: 'Protocol cuts overhead for smart controllers' pages 34,36,38 *
IBM TECHNICAL DISCLOSURE BULLETIN. vol. 30, no. 12, May 1988, NEW YORK US pages 360 - 362; 'QUEUING/REQUEUING TECHNIQUE' *
IBM TECHNICAL DISCLOSURE BULLETIN. vol. 32, no. 3B, August 1989, NEW YORK US pages 488 - 492; 'ALGORITHM FOR MANAGING MULTIPLE FIRST-IN, FIRST-OUT QUEUES FROM A SINGLE SHARED RANDOM-ACCESS MEMORY' *

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5440690A (en) * 1991-12-27 1995-08-08 Digital Equipment Corporation Network adapter for interrupting host computer system in the event the host device driver is in both transmit and receive sleep states
EP0551191A1 (fr) * 1992-01-09 1993-07-14 Digital Equipment Corporation Méthode et appareil pour le transfert de données à et d'un système d'ordinateur hôte
US5740467A (en) * 1992-01-09 1998-04-14 Digital Equipment Corporation Apparatus and method for controlling interrupts to a host during data transfer between the host and an adapter

Also Published As

Publication number Publication date
JPH03142648A (ja) 1991-06-18
CA2021266A1 (fr) 1991-05-01
EP0425764A3 (en) 1992-09-30

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