EP0404891A1 - Verfahren zur herstellung elektrisch leitfähiger strukturen. - Google Patents
Verfahren zur herstellung elektrisch leitfähiger strukturen.Info
- Publication number
- EP0404891A1 EP0404891A1 EP89913059A EP89913059A EP0404891A1 EP 0404891 A1 EP0404891 A1 EP 0404891A1 EP 89913059 A EP89913059 A EP 89913059A EP 89913059 A EP89913059 A EP 89913059A EP 0404891 A1 EP0404891 A1 EP 0404891A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- connection
- areas
- electrically conductive
- structures
- printed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4092—Integral conductive tabs, i.e. conductive parts partly detached from the substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0393—Flexible materials
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
- H05K3/181—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
Definitions
- the present invention relates to electrically conductive structures, e.g. printed electrical circuits.
- electrically conductive structures are formed from a metal foil applied to a carrier by etching away parts of the metal foil.
- a printed circuit board manufactured in this way has the advantage of a low line resistance because of the conductor tracks consisting of pure metal.
- the disadvantage is the large manufacturing effort.
- Printed electrical circuits can be produced using a different process, which is also suitable for multilayer electrical circuits (multilayer), with significantly less manufacturing effort and higher precision. In this method, the electrically conductive structures are printed by printing a conductive
- Paste for example a silver paste, in particular screen printed on an insulating carrier.
- the disadvantage with such printed circuits is that Because of the binder contained in the paste and the size of the silver particles, the conductivity of the paste is not particularly good. It is therefore customary to print relatively thick conductor tracks (8 to 12 ⁇ m). In addition, if a silver paste is used, the silver migrates between adjacent conductor tracks of different potentials when exposed to moisture and leads to leakage currents and even short circuits. It is therefore necessary to protect the conductor tracks with special protective films. Another disadvantage is that no components can be soldered onto the conductor tracks (DE 34 13 408).
- a method for producing electrically conductive structures in which a substance consisting of organometallic activators, organic solvents, fillers and binders is used known from DE 32 41 579. Methods for producing printed circuits are also described in DE 26 35 457 and DE 27 37 582. From DE 34 13 408, DE
- an electrically conductive structure which consists of a carrier with, in particular, an insulating surface and a metal layer electrolessly deposited on the surface with a printed substance containing an activator, the substance being organometallic activators , Fillers, organic solvents and binders ent holds.
- Such structures adhere firmly to the surface of the substrate, so that the conductor track cannot be inadvertently detached.
- a disadvantage of these electrically conductive structures is that the conductor ends cannot be detached for the purpose of producing free-standing metallic connection areas. So far, it was therefore necessary to design the connection and plug area using a complicated method, after either the connections (pins) are mechanically fastened (insulation displacement technology) or punched.
- the present invention therefore relates to electrically conductive structures consisting essentially of a support with an insulating surface and a metal layer electrolessly deposited on a surface by means of an applied formulation from a metallization bath, the formulation thereby containing organometallic activators, organic solvents, fillers and binders characterized in that the structures have integrated free-standing metallic connection areas.
- Catalytically active formulations suitable for electroless metallization are mentioned, for example, in DE 37 43 780, DE 36 27 256 and DE 36 25 587.
- Particularly suitable binders and solvents are those according to DE 37 33 002.
- Polyurethane elastomers in combination with halogen-free solvents are preferred.
- the substances are generally produced by mixing the constituents.
- wet reduction units customary in coating and printing technology such as kneaders, attractors, roller mills, dissolvers, rotor-stator mills; Ball mills and agitator mills are particularly suitable.
- formulation components can also be carried out in separate steps. For example, you can first dissolve or disperse the activator in the binders and solvents and only then work in the fillers. «A previous method of introducing the fillers into the solvents under high shear forces is also a possible process variant.
- the formulations are generally applied by processes known from coating or printing technology, e.g. by spraying, spreading, rolling up, dipping, coating, printing (e.g. on offset printing, screen printing, tampon printing) or using the ink jet process.
- Glass, quartz, ceramic, enamel, paper, polyethylene, polypropylene, epoxy resins, polyesters, polycarbonates, polyamides, polyimides, polyhydantoins, ABS plastics, silicones, polyvinyl halides, polyvinylidene fluoride are suitable as substrates for the process according to the invention
- Suitable activators are, in particular, those listed in EP 34 485, EP 81 438 or EP 131 195.
- the solvents are removed. Generally this is done by drying.
- the surfaces activated with the formulations are electrolessly metallized in a further process step. Baths with nickel, cobalt, iron, copper, silver, gold and palladium salts or mixtures thereof are particularly suitable for this purpose. Such metallization baths are known in the technology of electroless metallization.
- Another object of the invention is a method for producing single or multi-layer electrically conductive structures with integrated free-standing connection and plug areas by applying a formulation containing organometallic activators to the support surface and subsequent wet chemical electroless metallization, characterized in that both the conductor tracks and also the connection and
- Plug areas are metallized in one operation and the metal layer is deposited in these areas with such a low adhesive strength that it can easily be detached from the substrate surface without damaging it.
- the adhesive strength can be determined, for example, by measuring methods according to DIN 40633, 53151 and 53494 (VIC).
- the metal layers deposited by this method have adhesive strengths of less than 15 N / inch, preferably 1-10 N / inch, in the connection area.
- the adhesive strength of the metal layers in the area of the conductor pattern should be at least 20 N / inch, preferably at least 25 N / inch.
- One variant consists in changing the type and content of the binders and fillers in the usual printing pastes. Such measures are generally known from printing technology.
- an adhesion-reducing variation of the fillers can also consist, for example, of additions of graphite or talc.
- the adhesive strength is reduced, for example, by reducing the acrylonitrile or by introducing longer aliphatic side chains into the acrylic ester component.
- adhesion-reducing additives such as, for example, nonionic surfactants, alkyl sulfonates, soaps, paraffins, and silicones, is also often advantageous.
- a second possibility is to use only well-adhering formulations and to reduce their adhesive strength by chemical or physical pretreatment of the substrate in the connection areas.
- chemical pretreatments are coatings with release agents, paints, etching and vapor deposition. Sandblasting processes and coronary discharges have proven themselves as physical pretreatment processes.
- Silicones are particularly suitable as release agents.
- a suitable etchant is e.g. Chromic sulfuric acid. Evaporation can be carried out, for example, with siloxanes.
- the plug and connection areas can be produced on another substrate which is connected to the carrier substrate, for example by welding, gluing or by means of coatings.
- the other substrate can be selected so that the adhesive strength of the electrically conductive structures formed thereon during the metallization is reduced.
- materials which are subsequently easy to remove for example by dissolving in etching or solvents. This variant of the method has the advantage that the carrier substrate no longer has to be removed after the detached structures have been detached.
- Metal layers can be deposited on the formulations containing organometallic activators, for example, in the following ways.
- the substances are only applied to the areas that are later to be electrically conductive.
- the gaps remain free.
- additively preferably 0.5 - 5 ⁇ m thick metal layers are deposited, which can then optionally be galvanically reinforced, of course after applying a suitable contact.
- the metal structures in the connection areas are then detached as described and, if appropriate, the substrate in the connector and connection area is removed.
- the entire metal layer can also be built up purely additively.
- a second possibility for building up a metallic structure according to the invention is that the organometallic substances are applied to the surface and the structuring is carried out semi-additively.
- this variant leads to structures with a high degree of dimensional accuracy and is therefore particularly suitable for the production of very fine conductor structures.
- the detached structural parts are then detached as described above.
- the metallic structures can also be protected against corrosion.
- Such methods are well known in the electroplating and printed circuit board industry. Examples include the application of protective lacquers, nickel, gold, palladium alloys and tin. Of course, it is also possible to protect only the free-standing connection and plug areas in this way.
- Another manufacturing process is characterized in that a formulation is applied in the connection area which detaches from the metallized structures when heated. Temperatures of 60 - 300 ° C are used to heat the substrate. 100-250 ° C., in particular 100-200 ° C., are preferred.
- thermoplastic binders used by suitable measures.
- this is achieved, for example, by higher proportions of aliphatic components or low (isocyanate) key figures.
- the applications of the circuits produced by the method according to the invention are diverse, for example flexible and rigid circuits or structures, shields, keyboards, sensors, endless conductors, film connectors.
- the electrically conductive structures according to the invention can of course according to the Production can be completely or partially protected and / or isolated by applying various substances. Such methods are generally known from electrical engineering (eg spraying, printing, spraying, dipping, coating).
- the invention further relates to a multilayer printed electrical circuit with integrated free-standing metallic connection areas, the electrically conductive structures of which are electrically separated from one another in the individual layers by, in particular, printed, insulating intermediate layers.
- the structures consist of a metal layer deposited electrolessly on the insulating surface of the carrier and the respective insulating intermediate layer by means of a substance containing an activator.
- the insulating intermediate layers have cutouts for the through-contacting and that the substance is printed over the entire surface or partially on the structure of the respective lower layer.
- an electrically conductive contact between the lower metal layer, on which the substance is printed over the entire surface or partially, and the metal layer which is electrolessly deposited on the substance is surprisingly obtained.
- multilayer circuits can also be used in the connection and Produce free-standing metallic electrically conductive structures in the connector areas. In this case, only certain layers can also be partially exposed, while other layers are produced without free-standing metallic connection areas.
- the structures according to the invention are used as printed circuit boards, film connectors and for the so-called "tape bonding".
- silica Aerosil ® (380 m 2 / g
- Polyurethane elastomers 20 parts by weight of a carbon black (Printex ® V),
- the prints are electrolessly coppered for 1 hour in a formally contained copper bath and then galvanically amplified to 20 ⁇ m.
- a film connector is obtained, from which the connection areas can easily be mechanically separated from the carrier film.
- Aerosil ® (380 m 2 / g according to BET) is printed on a 75 ⁇ m polyimide film (Kapton ® ), a film connector structure without attachment areas and the print is dried at 160 ° C. for 10 minutes.
- Aerosil ® 200 m 2 / g according to BET
- connection areas of a film connector are sprayed onto a polyethylene terephthalate film using a template with a 0.1% strength solution of a methylpolysiloxane in white spirit and dried.
- the entire film connector structure is then printed using a screen printing paste according to Example 1A, dried at 150 ° C. for 1 hour and copper-plated for 1 hour without current.
- the copper-plated structure is then galvanically reinforced to 35 ⁇ m.
- a film connector is obtained in which the connection areas can be easily mechanically detached from the carrier film.
- a 50 ⁇ m polyimide film is coated on one side over the entire area with a formulation according to Example 2A.
- the coated film is dried for 45 minutes at 250 ° C. and copper-plated in an electroless copper bath for 1 hour.
- the negative image of a chip carrier with 84 connections is applied to the copper surface by means of a galvanoresist and galvanically built up in the free-standing areas of 10 ⁇ m copper, approx. 2 ⁇ m nickel and approx. 3 ⁇ m gold.
- the copper surfaces between the conductor tracks are etched away.
- An alkali-resistant etching resist is printed on both sides so that the later An end and connector areas remain free. In these areas, the substrate is etched away using a hot potassium hydroxide solution. After removing the etching resist, a chip carrier with free-standing connection and plug areas is obtained.
- Example 2 B 60 g of glycolic acid butyl ester and 1.4 g of bis-acetonitrile palladium dichloride are printed on a surface on a 75 ⁇ m film, in which the subsequent connection areas are left out. These areas are then printed with a paste according to Example 2 B. The printed areas are dried for 1 hour at 150 ° C, copper-plated in a formally-containing copper bath and then galvanically reinforced to 20 ⁇ m. A foil connector structure is produced by etching after the application of a resist, from which the plug regions can be easily mechanically removed.
Description
Claims
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE3836605 | 1988-10-27 | ||
DE3836605 | 1988-10-27 | ||
DE3932017 | 1989-09-26 | ||
DE3932017A DE3932017A1 (de) | 1988-10-27 | 1989-09-26 | Elektrisch leitende strukturen |
PCT/EP1989/001268 WO1990004913A1 (de) | 1988-10-27 | 1989-10-24 | Elektrisch leitende strukturen |
Publications (2)
Publication Number | Publication Date |
---|---|
EP0404891A1 true EP0404891A1 (de) | 1991-01-02 |
EP0404891B1 EP0404891B1 (de) | 1994-06-01 |
Family
ID=25873666
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP89913059A Expired - Lifetime EP0404891B1 (de) | 1988-10-27 | 1989-10-24 | Verfahren zur herstellung elektrisch leitfähiger strukturen |
Country Status (5)
Country | Link |
---|---|
EP (1) | EP0404891B1 (de) |
JP (1) | JPH03504060A (de) |
DE (2) | DE3932017A1 (de) |
FI (1) | FI903182A0 (de) |
WO (1) | WO1990004913A1 (de) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2395365A (en) * | 2002-11-13 | 2004-05-19 | Peter Leslie Moran | Manufacturing process for electrical circuit board with integrally formed track and connection pins |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE4235019C1 (de) * | 1992-10-16 | 1994-04-21 | Ame Gmbh | Leiterplattenherstellung sowie Montage- und Kontaktierungsverfahren für Bauelemente durch stromlose Metallabscheidung |
FR2700659B1 (fr) * | 1993-01-18 | 1995-03-24 | Matra Sep Imagerie Inf | Procédé de fabrication de circuits multicouches er circuits ainsi obtenus. |
DE10317793B4 (de) * | 2003-04-16 | 2007-02-22 | AHC-Oberflächentechnik GmbH & Co. OHG | Verwendung eines Gegenstands als elektrisches oder elektronisches Bauteil |
DE10331574A1 (de) * | 2003-07-11 | 2005-02-17 | eupec Europäische Gesellschaft für Leistungshalbleiter mbH | Leistungshalbleitermodul |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2486755A1 (fr) * | 1980-07-11 | 1982-01-15 | Socapex | Support de composants electroniques pour circuits hybrides de grandes dimensions |
DE3138987C2 (de) * | 1981-09-30 | 1984-03-29 | Siemens AG, 1000 Berlin und 8000 München | Einrichtung zum Verhindern von Beschädigungen von Bausteinen bzw. Leiterbahnen auf einer Leiterplatte |
WO1988002592A1 (en) * | 1986-09-30 | 1988-04-07 | Wilde Membran Impulstechnik Gmbh | Electrically conductive structure with applied metallization |
DE3733002A1 (de) * | 1986-09-30 | 1988-04-07 | Wilde Membran Impuls Tech | Additiv metallisierte elektrisch leitfaehige struktur |
US4728751A (en) * | 1986-10-06 | 1988-03-01 | International Business Machines Corporation | Flexible electrical connection and method of making same |
-
1989
- 1989-09-26 DE DE3932017A patent/DE3932017A1/de not_active Withdrawn
- 1989-10-24 JP JP2500033A patent/JPH03504060A/ja active Pending
- 1989-10-24 WO PCT/EP1989/001268 patent/WO1990004913A1/de active IP Right Grant
- 1989-10-24 EP EP89913059A patent/EP0404891B1/de not_active Expired - Lifetime
- 1989-10-24 DE DE58907789T patent/DE58907789D1/de not_active Expired - Fee Related
-
1990
- 1990-06-25 FI FI903182A patent/FI903182A0/fi not_active Application Discontinuation
Non-Patent Citations (1)
Title |
---|
See references of WO9004913A1 * |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2395365A (en) * | 2002-11-13 | 2004-05-19 | Peter Leslie Moran | Manufacturing process for electrical circuit board with integrally formed track and connection pins |
GB2395365B (en) * | 2002-11-13 | 2006-03-22 | Peter Leslie Moran | Electrical circuit board |
Also Published As
Publication number | Publication date |
---|---|
FI903182A0 (fi) | 1990-06-25 |
WO1990004913A1 (de) | 1990-05-03 |
DE3932017A1 (de) | 1990-05-03 |
DE58907789D1 (de) | 1994-07-07 |
EP0404891B1 (de) | 1994-06-01 |
JPH03504060A (ja) | 1991-09-05 |
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