EP0350766A2 - Discriminateur de fréquence pour circuits intégrés - Google Patents

Discriminateur de fréquence pour circuits intégrés Download PDF

Info

Publication number
EP0350766A2
EP0350766A2 EP89112165A EP89112165A EP0350766A2 EP 0350766 A2 EP0350766 A2 EP 0350766A2 EP 89112165 A EP89112165 A EP 89112165A EP 89112165 A EP89112165 A EP 89112165A EP 0350766 A2 EP0350766 A2 EP 0350766A2
Authority
EP
European Patent Office
Prior art keywords
input
transistor
resistor
multiplier
frequency discriminator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP89112165A
Other languages
German (de)
English (en)
Other versions
EP0350766A3 (en
EP0350766B1 (fr
Inventor
Rolf Dr. Böhme
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Conti Temic Microelectronic GmbH
Original Assignee
Telefunken Electronic GmbH
Temic Telefunken Microelectronic GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telefunken Electronic GmbH, Temic Telefunken Microelectronic GmbH filed Critical Telefunken Electronic GmbH
Publication of EP0350766A2 publication Critical patent/EP0350766A2/fr
Publication of EP0350766A3 publication Critical patent/EP0350766A3/de
Application granted granted Critical
Publication of EP0350766B1 publication Critical patent/EP0350766B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D3/00—Demodulation of angle-, frequency- or phase- modulated oscillations
    • H03D3/02—Demodulation of angle-, frequency- or phase- modulated oscillations by detecting phase difference between two signals obtained from input signal
    • H03D3/06—Demodulation of angle-, frequency- or phase- modulated oscillations by detecting phase difference between two signals obtained from input signal by combining signals additively or in product demodulators
    • H03D3/16—Demodulation of angle-, frequency- or phase- modulated oscillations by detecting phase difference between two signals obtained from input signal by combining signals additively or in product demodulators by means of electromechanical resonators

Definitions

  • the invention relates to a circuit arrangement for demodulating frequency-modulated vibrations for integrated circuits, which only requires a pin or external connection for a selection means and is also suitable for battery-operated devices because of its low current and voltage requirements.
  • a typical application is FM receivers with an intermediate frequency of 10.7 MHz.
  • a frequently chosen embodiment of frequency discriminators consists in supplying the signal to be demodulated once directly and once via a phase-shifting network to the two inputs of a multiplier.
  • the phase-shifting network preferably consists of a capacitively coupled resonance circuit and provides a phase shift in the vicinity of 90 °. Since the middle output signal of the multiplier disappears at the inputs of a multiplier with phase-shifted signals by 90 °, frequency deviations and thus phase deviations at the resonant circuit result in an output signal proportional to the frequency deviation.
  • phase-shifting network must be connected externally. In addition to the general earth or reference terminal, two further connections of the integrated circuit are required.
  • a bridge circuit consisting of 4 impedances is used, 3 impedances being ohmic resistors and the fourth, externally connected to ground, a resonator with a series resonance below the center frequency and a parallel resonance above the center frequency. Such a resonator acts inductively in the working frequency range.
  • the bridge circuit is connected between the output of the IF amplifier and ground.
  • the first input of the multiplier is connected to the output of the IF amplifier.
  • the second input of the multiplier is connected to the output of the bridge circuit.
  • a typical power distribution multiplier requires input voltages of around 100 mV. Since the bridge circuit has an attenuation of at least 6 dB, the output of the IF amplifier must provide at least 200 mV or a preamplifier must be connected after the bridge circuit.
  • the impedance of the bridge branches in the known circuit must not be too high to make the system insensitive to stray capacities.
  • the standard value at 10.7 MHz is 1 kOhm. According to this load, the output of the IF amplifier must generate a considerable current.
  • the output of the IF amplifier of an integrated circuit has a certain quiescent potential.
  • the ord The proper function of the power distribution multiplier requires the provision of suitable resting potentials for the inputs. If you connect the bridge circuit between the output of the IF amplifier and ground, an undesirable direct current flows through the branch with ohmic resistors. The insertion of a coupling capacitance suppresses the direct current, but requires a relatively large capacitor because of the low impedances. In order to establish the resting potentials of the inputs of the current distribution multiplier, either further coupling capacitors or also emitter followers are required. However, this also creates additional phase errors.
  • the object of the invention is to provide a frequency discriminator which manages with a small input voltage, does not require coupling capacitors and has a low current requirement. This object is achieved by a frequency discriminator with the characterizing features of claim 1.
  • FIG. 1 serves to explain the principle of the known bridge discriminator.
  • Two connections A, B represent the input of the discriminator.
  • the two connections A, B are connected to the symmetrical output of an IF amplifier IFA and the X input of a multiplier M.
  • the bridge circuit is connected to an input connection A.
  • the first branch of the bridge is formed by resistor R2 and resonator KR.
  • the connection point C corresponds to the pin of an integrated circuit.
  • the second branch consists of the resistors R4, R3.
  • a coupling capacitor C3 is also connected in series to the resistor R3. Both branches of the bridge circuit lead to the ground point.
  • the bridge voltage is taken between the point C and the connection point D of the resistors R3, R4 and fed to the Y input of the multiplier M.
  • the resonator KR can be designed as a piezoelectric oscillator or it can also consist of an inductor and two capacitors. It has an inductive effect in the operating frequency range, has a series resonance with a very low impedance below and a parallel resonance with a large impedance above.
  • the capacitance C3 in particular proves to be a hurdle, since the typical impedance values of the bridge elements of approximately 1 k ⁇ require an unpleasantly large and thus area-intensive capacitance.
  • the output voltage of the bridge is half the input voltage between A and ground and therefore a quarter of the input voltage at input A, B.
  • the desired switching operation of the multiplier at least 100 mV is required at the Y input. Taking into account the mute function and other conditions, a multiple of this value may be required. This means that a considerable signal power must be provided at input A, B of the discriminator, which has a negative effect on voltage and current requirements.
  • the input A, B of the discriminator circuit is connected to the X input of the multiplier.
  • a first transistor T1 has its base connected to input A, its emitter is connected via a resistor R1 to connection C and to a current source I1. Its collector is connected to the supply voltage Vd via a resistor R2.
  • This circuit part supplies a voltage at the collector of the first transistor T1 which is variable in magnitude and phase due to the influence of the resonator KR.
  • a second and a third transistor T2, T3 are used to generate a frequency-independent voltage across the resistor R3.
  • the relevant voltages and currents of this arrangement are shown as pointers.
  • the pointers of the voltages VA, VB form an opposite pair of pointers at the input terminals A, B.
  • the function of the transistor T1 as an emitter follower transfers the voltage VA to the series circuit of the resonator KR and resistor R1 and generates the current IT1.
  • the tip of IT1 moves on an arc, as indicated in the drawing.
  • the current IT1 also flows, as far as one can neglect the base current, in the collector circuit of the transistor T1 and generates the voltage drop VR2 across the resistor R2.
  • the pointer of the voltage drop VR3 across the resistor R3 follows from a similar consideration with regard to the second and third transistors T2, T3 and the resistor R4.
  • the difference Vy of the voltages VR2, VR3 is perpendicular to VA and VB and only changes the phases when the frequency changes, not the amount. It is the voltage that is fed to the Y input of multiplier M.
  • the high input voltage VAB is not required, as in the circuit according to FIG. 1.
  • the currents decrease accordingly.
  • the DC component of the voltage at the Y input can be made zero by the choice of the currents and the resistors without the need for a coupling capacitor.
  • the X signal according to FIG. 4 can also be taken from the collectors of the transistors T2, T3.
  • a load resistor R5 is inserted in the collector circuit of the third transistor T3.
  • an emitter follower with transistors T4, T5 is connected upstream of the Y input of multiplier M in FIG.
  • the input potential of the Y input is lower than the input potential of the X input by a base-emitter voltage, a prerequisite for the use of the Gilbert current distribution multiplier.
  • FIG. 4 also shows a variant of the connection of the emitters of the transistors T2, T3.
  • the two emitters of the transistors T2, T3 are connected to one another via a series connection of two resistors R4a, R4b.
  • a current source I23 is connected to the connection point of the resistors R4a, R4b.
  • This variant only requires one current source for the two transistors. As a result of the direct voltage drop across the resistors R4a, R4b, however, the working voltage of the current source is reduced.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)
  • Networks Using Active Elements (AREA)
EP89112165A 1988-07-15 1989-07-04 Discriminateur de fréquence pour circuits intégrés Expired - Lifetime EP0350766B1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE3824015 1988-07-15
DE3824015A DE3824015A1 (de) 1988-07-15 1988-07-15 Frequenzdiskriminator fuer integrierte schaltungen

Publications (3)

Publication Number Publication Date
EP0350766A2 true EP0350766A2 (fr) 1990-01-17
EP0350766A3 EP0350766A3 (en) 1990-07-04
EP0350766B1 EP0350766B1 (fr) 1994-09-07

Family

ID=6358744

Family Applications (1)

Application Number Title Priority Date Filing Date
EP89112165A Expired - Lifetime EP0350766B1 (fr) 1988-07-15 1989-07-04 Discriminateur de fréquence pour circuits intégrés

Country Status (2)

Country Link
EP (1) EP0350766B1 (fr)
DE (2) DE3824015A1 (fr)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2324161A1 (fr) * 1975-09-10 1977-04-08 Sony Corp Demodulateur en modulation de frequence
JPS55136707A (en) * 1979-04-11 1980-10-24 Sony Corp Fm demodulation circuit

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3127229A1 (de) * 1981-07-10 1983-01-20 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Demodulator

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2324161A1 (fr) * 1975-09-10 1977-04-08 Sony Corp Demodulateur en modulation de frequence
JPS55136707A (en) * 1979-04-11 1980-10-24 Sony Corp Fm demodulation circuit

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
IEEE TRANSACTIONS ON CONSUMER ELECTRONICS, Band CE-28, Nr. 3, August 1982, Seiten 393-407, IEEE, New York, US; TAIWA OKANOBU: "A complete single chip AM/FM radio integrated circuit" *
PATENT ABSTRACTS OF JAPAN, Band 5, Nr. 7 (E-41)[679], 17. Januar 1981; & JP-A-55 136 707 (SONY K.K.) 24-10-1980 *

Also Published As

Publication number Publication date
EP0350766A3 (en) 1990-07-04
EP0350766B1 (fr) 1994-09-07
DE58908305D1 (de) 1994-10-13
DE3824015C2 (fr) 1990-12-20
DE3824015A1 (de) 1990-01-18

Similar Documents

Publication Publication Date Title
EP0087175B1 (fr) Circuit pour commander électroniquement le gain
DE1812292B2 (de) Schaltungsanordnung zur verstaerkungsregelung
DE10015177B4 (de) Mischschaltung
DE3015919A1 (de) Filterschaltung
DE2810280A1 (de) Oszillatorschaltung, insbesondere fuer einen synchron-demodulation
DE2738732C2 (fr)
EP0141933B1 (fr) Oscillateur à circuit intégré
DE2649745C2 (de) Frequenzsteuerbarer Oszillator
DE2826536B1 (de) Schaltungsanordnung zur erdfreien UEbertragung von Signalen ueber Trennstellen in Fernmeldeanlagen
EP0350766B1 (fr) Discriminateur de fréquence pour circuits intégrés
EP0133618B1 (fr) Circuit oscillateur haute fréquence à quartz sous forme de circuit intégré monolithique
DE1271214C2 (de) Frequenzmodulationsschaltung
DE10345234B3 (de) Oszillatoranordnung mit erhöhter EMI-Robustheit
EP0176069A1 (fr) Filtre passe-haut avec amplificateur
DE1261191B (de) Mischschaltung
DE3032660C2 (de) Demodulatorschaltung zum Demodulieren eines winkelmodulierten Eingangssignals
EP0691734B1 (fr) Circuit amplificateur pour signaux à haute fréquence
EP0013943A1 (fr) Filtre passe-bas monolithiquement intégrable
EP0697765B1 (fr) Circuit de modulation par déplacement de phase
DE1094312B (de) Frequenzdemodulator
DE1462876B2 (de) Leseverstärker für Speicher
AT235339B (de) Frequenzdiskriminator
DE1909975C3 (de) Transistorverstärker
EP0766380A2 (fr) Composant micro-onde en silice à circuit intégré
DE1762999C3 (de) Mehrstufiger Begrenzerverstärker

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

AK Designated contracting states

Kind code of ref document: A2

Designated state(s): DE FR GB IT

PUAL Search report despatched

Free format text: ORIGINAL CODE: 0009013

AK Designated contracting states

Kind code of ref document: A3

Designated state(s): DE FR GB IT

17P Request for examination filed

Effective date: 19900919

RAP1 Party data changed (applicant data changed or rights of an application transferred)

Owner name: TEMIC TELEFUNKEN MICROELECTRONIC GMBH

17Q First examination report despatched

Effective date: 19930517

GRAA (expected) grant

Free format text: ORIGINAL CODE: 0009210

AK Designated contracting states

Kind code of ref document: B1

Designated state(s): DE FR GB IT

ITF It: translation for a ep patent filed

Owner name: DE DOMINICIS & MAYER S.R.L.

GBT Gb: translation of ep patent filed (gb section 77(6)(a)/1977)

Effective date: 19940913

REF Corresponds to:

Ref document number: 58908305

Country of ref document: DE

Date of ref document: 19941013

ET Fr: translation filed
PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: GB

Payment date: 19950616

Year of fee payment: 7

PLBE No opposition filed within time limit

Free format text: ORIGINAL CODE: 0009261

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: FR

Payment date: 19950712

Year of fee payment: 7

26N No opposition filed
PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: DE

Payment date: 19950915

Year of fee payment: 7

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: GB

Effective date: 19960704

GBPC Gb: european patent ceased through non-payment of renewal fee

Effective date: 19960704

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: FR

Effective date: 19970328

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: DE

Effective date: 19970402

REG Reference to a national code

Ref country code: FR

Ref legal event code: ST

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: IT

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES;WARNING: LAPSES OF ITALIAN PATENTS WITH EFFECTIVE DATE BEFORE 2007 MAY HAVE OCCURRED AT ANY TIME BEFORE 2007. THE CORRECT EFFECTIVE DATE MAY BE DIFFERENT FROM THE ONE RECORDED.

Effective date: 20050704