EP0327787A1 - Binary clock - Google Patents

Binary clock Download PDF

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Publication number
EP0327787A1
EP0327787A1 EP88810414A EP88810414A EP0327787A1 EP 0327787 A1 EP0327787 A1 EP 0327787A1 EP 88810414 A EP88810414 A EP 88810414A EP 88810414 A EP88810414 A EP 88810414A EP 0327787 A1 EP0327787 A1 EP 0327787A1
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EP
European Patent Office
Prior art keywords
display
binary
clock according
clock
segments
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EP88810414A
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German (de)
French (fr)
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René Linder
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Individual
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Individual
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    • G—PHYSICS
    • G04—HOROLOGY
    • G04G—ELECTRONIC TIME-PIECES
    • G04G9/00—Visual time or date indication means
    • G04G9/08—Visual time or date indication means by building-up characters using a combination of indicating elements, e.g. by using multiplexing techniques
    • G—PHYSICS
    • G04—HOROLOGY
    • G04G—ELECTRONIC TIME-PIECES
    • G04G9/00—Visual time or date indication means

Definitions

  • the present invention relates to a binary clock comprising electronic time measurement means.
  • Such clocks or electronic timepieces are known, but the time is displayed in these clocks either digitally or analogically, using hands controlled by a stepping motor.
  • the present invention proposes to produce a clock with binary time display.
  • a clock made for example in wall execution, is intended to be used preferably in schools or educational institutes, universities, etc. to familiarize pupils or students with the binary number system.
  • the direction of reading the bits with the weights or powers of two assigned to them can be reversed in order to perfect the training of the observers in binary reading.
  • the clock can display the time simultaneously digitally (display of digits) or analog (display by hands).
  • FIG. 1 shows an example of display comprising three zones I, II and III, respectively to indicate the hours from 0 to 12, as well as the minutes and seconds from 0 to 59. It is of course possible, if desired, to '' display the hours from 0 to 24.
  • Each zone comprises segments 1 each carrying for example three display elements, such as light-emitting diodes LED 2 and 3.
  • the diodes 3, of small dimensions are arranged in the center of each segment and the diodes 2 of larger dimension are arranged at the ends of the segments 1. It is known that in the binary numbering system, a number is composed of a series of bits of value 0 or L, a power of two being associated with each bit.
  • the least significant bit 20 is that located at the extreme right of the number and the most significant bit 2 n is that of the extreme left.
  • each segment represents a bit, the six segments of zones II and III respectively representing, and read from right to left, the bits 20, 21, 22, 23, 24 and 25.
  • These powers of two or weights are displayed by LEDs 3 which light up as the number displayed increases between 0 and 12, respectively between 0 and 59.
  • LEDs 2 indicate that the segment on which they are find represents a bit of value L if they are on or a bit of value 0 if they are off.
  • area III displays the number 28 calculated from the binary system as follows:
  • FIG. 2 shows an exemplary embodiment of a binary display using LED light-emitting diodes.
  • This display comprises an upper glass plate 4 under which are arranged plexiglass blocks 5 in the form of segments 1 and a plastic plate 6 supporting the diodes 2 and 3 and forming the base.
  • a passage 7 is provided in the plexiglass 5 to conduct the light from the central diodes 3 to the lower surface of the glass plate 4.
  • Spherical cavities 8 are provided in the plexiglass, above the diodes 2 of larger dimensions . Knowing that the plexiglass is of milky execution, that is to say not entirely transparent, the above arrangement allows the light from the diodes 2 to diffuse in the plexiglass and to extend in the direction of the length for form the segments 1 of FIG. 1. Each segment therefore behaves optically as a light line when the diodes 2 which it comprises are lit.
  • FIGS. 1 and 2 The arrangement of the display illustrated in FIGS. 1 and 2 is not exhaustive and it is clear that any other arrangement making it possible to display a binary number is included in the present invention.
  • the display can be achieved using several different display technologies such as electro-mechanical, LED, LCD, neon, CRT, laser, incandescent or fluorescent vacuum.
  • FIG. 3 shows a very simplified block diagram of the clock electronics.
  • This includes a quartz oscillator 9 which controls a frequency divider 10.
  • a decoding circuit 11 delivers the signals necessary for a digital display 12 of the time, this digital display being intended to facilitate the learning of binary reading ; it can be put into service or triggered by a switch 13 and it is intended to be incorporated into the binary display or mounted next to it.
  • an analog display 14 with needles and stepper motor controlled through a switch 16 by a control circuit 15 can be incorporated into the binary display or mounted next to it.
  • the analog display 14 is provided for the same purpose as the digital display 12.
  • a multiple switch 17 is provided to reverse the direction of reading of the bits of the binary display, as indicated above.
  • the switch 17 illustrated in FIG. 3 enables the direction of reading of the bits of zone III to be reversed. In the position shown, the least significant bit 2 ° is delivered to the right input f of the logic 18 and the most significant bit 25 to the left input a of the logic 18.
  • This example corresponds to the display of the number 28 illustrated in FIG. 3.
  • the bits 20 and 21 on the inputs f and e of the logic 18 have a value 0, so that the diodes 2 of the corresponding segments are extinguished.
  • the bits 22, 23 and 24 on the inputs d, c and b have a value 1 and the diodes 2 of the corresponding segments are lit.
  • the reading order of the bits is reversed, the least significant bit being delivered to input a and the most significant bit to input f of logic 18.
  • the number displayed 28 must be read with the weights of the bits increasing from left to right, between 20 and 25.
  • the intended reversal of the direction of reading of the bits is intended to perfect the learning. of binary reading and constitutes a gymnastics of the mind.
  • the logic 18 controls the binary display 19 and fulfills various functions such as the control of the diodes 3 indicating the bits to be taken into consideration.
  • any other combination of display elements for indicating the weights and the 0 and L values of the display bits is included within the scope of the present invention.
  • the electronic means provided in FIG. 3 can be used if desired to control a plurality of binary displays 19 and digital 12 or analog displays 14.
  • FIG. 4 shows a more detailed block diagram of electronics which do not include reversing the direction of reading of the bits.
  • Circuit 20 is a supply circuit which also produces synchronous rectangular pulses with the frequency of the network. These signals are delivered to a frequency divider 21 by 50, resp. par 60 depending on the regions in which the network frequency is 50 Hz, resp. 60 Hz.
  • the divider 21 delivers 1 Hz repetition frequency signals to a circuit 22 for controlling the segments 1 of the binary display 19 displaying the seconds (field III of FIG. 1).
  • the circuit 22 also delivers one pulse per minute to the circuit 23 for controlling the segments 1 of the minutes display (field II of FIG. 1).
  • the circuit 23 is coupled to the circuit 24 for controlling the segments 1 of the hour display (field I of FIG. 1) itself connected to the circuit 25 for controlling an AM / PM display.
  • the control information for the minutes and hours of the binary display 19 is delivered to a digital multiplexer 26 which is controlled by a digital selector 27 itself controlled by a time base generator 28.
  • the signals from generator 28 are clock pulses for the digit selector 27.
  • the multiplexer 26 is informed of the selected digit and of the time to be displayed (minutes and hours). These two pieces of information are necessary to determine the digit to be displayed and they are supplied to the coding circuit 29 for the correct control of the segments of the digital display 30.
  • a new digit is formed with each new clock pulse and the cycle is sufficient fast to avoid flickering of the display 30.
  • the invention does not apply exclusively to clocks, but to any timepiece such as a watch, wristwatch, alarm clock, etc.

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Electric Clocks (AREA)
  • Electromechanical Clocks (AREA)

Abstract

A clock has a circular face divided into 3 horizontal zones, which formm the top, display hours, minutes and seconds respectively. Each zone is divided into segments, the position and number of which correspond to binary values of hours, minutes and seconds as appropriate e.g. 4 segments for zone 1 have the values from right to left of 1,2,4 and 8 hoUrs. Each segment ahs 1 small LED in between 2 large ones. When the segment represents a binary 1 all 3 LEDs are lit. When the segment represents a binary 0 the two large LEDs are extinguished and the small one is lit if there is a binary 1 displayed in its zone to its left otherwise it is extinguished also.

Description

La présente invention concerne une horloge binaire comprenant des moyens électroniques de mesure du temps.The present invention relates to a binary clock comprising electronic time measurement means.

De telles horloges ou pièces d'horlogerie électronique sont connues, mais l'affichage du temps est effectué dans ces horloges soit par voie digitale, soit par voie analogique, à l'aide d'aiguilles commandées par un moteur pas à pas.Such clocks or electronic timepieces are known, but the time is displayed in these clocks either digitally or analogically, using hands controlled by a stepping motor.

La présente invention se propose de réaliser une horloge avec affichage binaire du temps. Une telle horloge réalisée par exemple en exécution murale, est destinée à être utilisée de préférence dans les écoles ou les ins­tituts d'enseignement, universités, etc. pour familiari­ser les élèves ou étudiants avec le système de numé­ration binaire. Selon une variante de l'invention, le sens de lecture des bits avec les poids ou puissances de deux attribués à ceux-ci peut être inversé afin de parfaire l'entraînement des observateurts à la lecture binaire. En outre, et pour faciliter et raccourcir le temps d'apprentissage, l'horloge peut afficher l'heure simultanément par voie digitale (affichage de digits) ou analogique (affichage par aiguilles).The present invention proposes to produce a clock with binary time display. Such a clock made for example in wall execution, is intended to be used preferably in schools or educational institutes, universities, etc. to familiarize pupils or students with the binary number system. According to a variant of the invention, the direction of reading the bits with the weights or powers of two assigned to them can be reversed in order to perfect the training of the observers in binary reading. In addition, and to facilitate and shorten the learning time, the clock can display the time simultaneously digitally (display of digits) or analog (display by hands).

L'invention va être décrite plus en détail ci-après à l'aide du dessin dans lequel:

  • La figure 1 montre une des dispositions possibles de l'affichage selon l'invention,
  • La figure 2 montre le principe de construction d'un affichage selon l'invention,
  • La figure 3 est un schéma-bloc très simplifié des moyens électroniques de l'horloge avec inversion du sens de lecture, et
  • La figure 4 est un schéma-bloc d'une variante sans inversion du sens de lecture.
The invention will be described in more detail below using the drawing in which:
  • FIG. 1 shows one of the possible arrangements of the display according to the invention,
  • FIG. 2 shows the principle of construction of a display according to the invention,
  • FIG. 3 is a very simplified block diagram of the electronic means of the clock with inversion reading direction, and
  • Figure 4 is a block diagram of a variant without reversing the direction of reading.

La figure 1 montre un exemple d'affichage comprenant trois zones I, II et III, respectivement pour indiquer les heures de 0 à 12, ainsi que les minutes et les secondes de 0 à 59. Il est bien entendu possible, si désiré, d'afficher les heures de 0 à 24. Chaque zone comprend des segments 1 porteurs chacun par exemple de trois éléments d'affichage, tels que des diodes électro­luminescentes LED 2 et 3. Les diodes 3, de petites dimensions sont disposées au centre de chaque segment et les diodes 2 de plus grande dimension sont disposées aux extrémités des segments 1. On sait que dans le système de numération binaire, un nombre est composé d'une suite de bits de valeur 0 ou L, une puissance de deux étant associée à chaque bit. Normalement, le bit le moins significatif 2⁰ est celui situé à l'extrême droite du nombre et le bit le plus significatif 2n est celui de l'extrême gauche. Dans l'affichage de la figure 1, chaque segment représente un bit, les six segments des zones II et III représentant respectivement, et lus de droite à gauche, les bits 2⁰, 2¹ , 2², 2³, 2⁴ et 2⁵. Ces puissances de deux ou poids sont affichés par les diodes LED 3 qui s'allument au fur et à mesure que le nombre affiché augmente entre 0 et 12, respectivement entre 0 et 59. Les diodes LED 2 indiquent que le segment sur lequel elles se trouvent représente un bit de valeur L si elles sont allumées ou un bit de valeur 0 si elles sont éteintes. Dans l'exemple indiqué en figure 3, la zone III affiche le nombre 28 calculé à partir du systême binaire comme suit:FIG. 1 shows an example of display comprising three zones I, II and III, respectively to indicate the hours from 0 to 12, as well as the minutes and seconds from 0 to 59. It is of course possible, if desired, to '' display the hours from 0 to 24. Each zone comprises segments 1 each carrying for example three display elements, such as light-emitting diodes LED 2 and 3. The diodes 3, of small dimensions are arranged in the center of each segment and the diodes 2 of larger dimension are arranged at the ends of the segments 1. It is known that in the binary numbering system, a number is composed of a series of bits of value 0 or L, a power of two being associated with each bit. Normally, the least significant bit 2⁰ is that located at the extreme right of the number and the most significant bit 2 n is that of the extreme left. In the display in FIG. 1, each segment represents a bit, the six segments of zones II and III respectively representing, and read from right to left, the bits 2⁰, 2¹, 2², 2³, 2⁴ and 2⁵. These powers of two or weights are displayed by LEDs 3 which light up as the number displayed increases between 0 and 12, respectively between 0 and 59. LEDs 2 indicate that the segment on which they are find represents a bit of value L if they are on or a bit of value 0 if they are off. In the example shown in Figure 3, area III displays the number 28 calculated from the binary system as follows:

Segments pris de droite à gauche:
0·2⁰ + 0·2¹ + 1·2² + 1·2³ + 1·2⁴ + 0·2⁵ =
= 0 + 0 + 4 + 8 + 16 + 0 = 28Segments taken from right to left:
0 · 2⁰ + 0 · 2¹ + 1 · 2² + 1 · 2³ + 1 · 2⁴ + 0 · 2⁵ =
= 0 + 0 + 4 + 8 + 16 + 0 = 28

La zone III affiche donc 28 secondes. Comptées à partir de la droite, seules les diodes 2 des segments 3, 4 et 5 sont allumées. Le dernier segment (segment 6) à l'extrê­me gauche de la zone III ne comporte aucune diode allumée par le fait qu'il correspond à un bit de poids 2⁵ = 32, ce nombre n'ayant pas encore été atteint.Zone III therefore displays 28 seconds. Counted from the right, only diodes 2 of segments 3, 4 and 5 are lit. The last segment (segment 6) on the far left of zone III does not have any diode lit by the fact that it corresponds to a bit of weight 2 32 = 32, this number having not yet been reached.

La figure 2 montre un exemple de réalisation d'un affichage binaire à l'aide de diodes électroluminescen­tes LED. Cet affichage comporte une plaque supérieure en verre 4 sous laquelle sont disposés des blocs de plexi­glas 5 en forme de segments 1 et une plaque de plastique 6 supportant les diodes 2 et 3 et formant la base. Un passage 7 est prévu dans le plexiglas 5 pour conduire la lumière des diodes centrales 3 jusqu'à la surface inférieure de la plaque de verre 4. Des cavités sphéri­ques 8 sont prévues dans le plexiglas, au-dessus des diodes 2 de plus grande dimensions. Sachant que le plexiglas est d'exécution laiteuse, c'est-à-dire non entièrement transparent, la disposition ci-dessus permet à la lumière des diodes 2 de diffuser dans le plexiglas et de s'étendre dans le sens de la longueur pour former les segments 1 de la figure 1. Chaque segment se comporte donc optiquement comme un trait lumineux lorsque les diodes 2 qu'il comporte sont allumées.Figure 2 shows an exemplary embodiment of a binary display using LED light-emitting diodes. This display comprises an upper glass plate 4 under which are arranged plexiglass blocks 5 in the form of segments 1 and a plastic plate 6 supporting the diodes 2 and 3 and forming the base. A passage 7 is provided in the plexiglass 5 to conduct the light from the central diodes 3 to the lower surface of the glass plate 4. Spherical cavities 8 are provided in the plexiglass, above the diodes 2 of larger dimensions . Knowing that the plexiglass is of milky execution, that is to say not entirely transparent, the above arrangement allows the light from the diodes 2 to diffuse in the plexiglass and to extend in the direction of the length for form the segments 1 of FIG. 1. Each segment therefore behaves optically as a light line when the diodes 2 which it comprises are lit.

La disposition de l'affichage illustrée en figures 1 et 2 n'est pas exhaustive et il est clair que toute autre disposition permettant d'afficher un nombre binaire est comprise dans la présente invention. En outre, l'affi­chage peut être réalisé à l'aide de plusieurs technolo­gies d'affichage différentes telles que électro-mécani­que, LED, LCD, néon, CRT, laser, incandescente ou fluorescente à vide.The arrangement of the display illustrated in FIGS. 1 and 2 is not exhaustive and it is clear that any other arrangement making it possible to display a binary number is included in the present invention. In addition, the display can be achieved using several different display technologies such as electro-mechanical, LED, LCD, neon, CRT, laser, incandescent or fluorescent vacuum.

La figure 3 montre un schéma-bloc très simplifié de l'électronique de l'horloge. Celle-ci comprend un oscillateur à quartz 9 qui commande un diviseur de fréquence 10. Un circuit de décodage 11 délivre les signaux nécessaires pour un affichage digital 12 de l'heure, cet affichage digital étant destiné à facili­ter l'apprentissage de la lecture binaire; il peut être mis en service ou déclenché par un interrupteur 13 et il prévu pour être incorporé à l'affichage bi­naire ou monté à côté de celui-ci. De même, un affichage analogique 14 avec aiguilles et moteur pas à pas commandé à travers un interrupteur 16 par un circuit de commande 15 peut être incorporé à l'affichage bi­naire ou monté à côté de celui-ci. L'affichage analo­gique 14 est prévu dans le même but que l'affichage digital 12. Un commutateur multiple 17 est prévu pour inverser le sens de lecture des bits de l'affichage binaire, comme indiqué plus haut. Le commutateur 17 illustré en figure 3 permet d'inverser le sens de lecture des bits de la zone III. Dans la position représentée, le bit le moins significatif 2° est délivré à l'entrée f de droite de la logique 18 et le bit le plus significatif 2⁵ à l'entrée a de gauche de la logique 18.Figure 3 shows a very simplified block diagram of the clock electronics. This includes a quartz oscillator 9 which controls a frequency divider 10. A decoding circuit 11 delivers the signals necessary for a digital display 12 of the time, this digital display being intended to facilitate the learning of binary reading ; it can be put into service or triggered by a switch 13 and it is intended to be incorporated into the binary display or mounted next to it. Likewise, an analog display 14 with needles and stepper motor controlled through a switch 16 by a control circuit 15 can be incorporated into the binary display or mounted next to it. The analog display 14 is provided for the same purpose as the digital display 12. A multiple switch 17 is provided to reverse the direction of reading of the bits of the binary display, as indicated above. The switch 17 illustrated in FIG. 3 enables the direction of reading of the bits of zone III to be reversed. In the position shown, the least significant bit 2 ° is delivered to the right input f of the logic 18 and the most significant bit 2⁵ to the left input a of the logic 18.

Dans ce cas, le nombre affiché "28" doit être lu avec les poids des bits croissant de droite à gauche, entre 2⁰ et 2⁵. 2⁵ 2⁴ 2³ 2² 2¹ 2⁰ poids 0 L L L 0 0 bits affichés et le nombre affiché "28" est obtenu par le calcul (de droite à gauche): 0·2⁰ + 0·2¹ + 1·2² + 1·2³ + 1·2⁴ + 0·2⁵ = = 0 + 0 + 4 + 8 + 16 + 0 = 28 In this case, the number displayed "28" must be read with the weights of the bits increasing from right to left, between 2⁰ and 2⁵. 2⁵ 2⁴ 2³ 2² 2¹ 2⁰ weight 0 L L L 0 0 bits displayed and the number displayed "28" is obtained by calculation (from right to left): 0 · 2⁰ + 0 · 2¹ + 1 · 2² + 1 · 2³ + 1 · 2⁴ + 0 · 2⁵ = = 0 + 0 + 4 + 8 + 16 + 0 = 28

Cet exemple correspond à l'affichage du nombre 28 illustré en figure 3. Les bits 2⁰ et 2¹ sur les entrées f et e de la logique 18 ont une valeur 0, de sorte que les diodes 2 des segments correspondants sont éteintes. Les bits 2², 2³ et 2⁴ sur les entrées d, c et b ont une valeur 1 et les diodes 2 des segments correspondants sont allumées. Enfin, le bit 2⁵ a une valeur 0 mais il n'a pas encore été atteint, de sorte que les diodes 2 et 3 de ce segment d'extrême gauche sont éteintes, ce qui montre que le nombre affiché (28 dans notre exemple) est plus petit que 2⁵ = 32.This example corresponds to the display of the number 28 illustrated in FIG. 3. The bits 2⁰ and 2¹ on the inputs f and e of the logic 18 have a value 0, so that the diodes 2 of the corresponding segments are extinguished. The bits 2², 2³ and 2⁴ on the inputs d, c and b have a value 1 and the diodes 2 of the corresponding segments are lit. Finally, the bit 2⁵ has a value 0 but it has not yet been reached, so that the diodes 2 and 3 of this far left segment are off, which shows that the number displayed (28 in our example) is smaller than 2⁵ = 32.

En plaçant le commutateur 17 sur l'autre position, l'ordre de lecture des bits est inversé, le bit le moins significatif étant délivré à l'entrée a et le bit le plus significatif à l'entrée f de la logique 18. Dans ce cas, le nombre affiché 28 doit être lu avec les poids des bits croissant de gauche à droite, entre 2⁰ et 2⁵. 2⁰ 2¹ 2² 2³ 2⁴ 2⁵ poids 0 0 L L L 0 bits affichés et le nombre affiché "28" est obtenu par le calcul (de gauche à droite):
0·2⁰ + 0·2¹ + 1·2² + 1·2³ + 1·2⁴ + 0·2⁵ = = 0 + 0 + 4 + 8 + 16 + 0 = 28 Comme indiqué plus haut, l'inversion prévue du sens de lecture des bits a pour but de parfaire l'apprentissage de la lecture binaire et constitue une gymnastique de l'esprit. La logique 18 commande l'affichge binaire 19 et elle rempli différentes fonctions telles que la commande des diodes 3 indiquant les bits à prendre en considération.By placing the switch 17 in the other position, the reading order of the bits is reversed, the least significant bit being delivered to input a and the most significant bit to input f of logic 18. In in this case, the number displayed 28 must be read with the weights of the bits increasing from left to right, between 2⁰ and 2⁵. 2⁰ 2¹ 2² 2³ 2⁴ 2⁵ weight 0 0 L L L 0 bits displayed and the number displayed "28" is obtained by calculation (from left to right):
0 · 2⁰ + 0 · 2¹ + 1 · 2² + 1 · 2³ + 1 · 2⁴ + 0 · 2⁵ = = 0 + 0 + 4 + 8 + 16 + 0 = 28 As indicated above, the intended reversal of the direction of reading of the bits is intended to perfect the learning. of binary reading and constitutes a gymnastics of the mind. The logic 18 controls the binary display 19 and fulfills various functions such as the control of the diodes 3 indicating the bits to be taken into consideration.

Il est clair que toute autre combinaison d'éléments d'affichage pour indiquer les poids et les valeurs 0 et L des bits de l'affichage est comprise dans le cadre de la présente invention. En outre, les moyens électroni­ques prévus en figure 3 peuvent servir si désiré à commander une pluralité d'affichages binaires 19 et d'affichages digitaux 12 ou analogiques 14.It is clear that any other combination of display elements for indicating the weights and the 0 and L values of the display bits is included within the scope of the present invention. In addition, the electronic means provided in FIG. 3 can be used if desired to control a plurality of binary displays 19 and digital 12 or analog displays 14.

La figure 4 montre un schéma-bloc plus détaillé d'une électronique ne comportant pas d'inversion du sens de lecture des bits. Le circuit 20 est un circuit d'ali­mentation qui produit aussi des impulsions rectangulai­res sychrones avec la fréquence du réseau. Ces signaux sont délivrés à un diviseur de fréquence 21 par 50, resp. par 60 selon les régions dans lesquelles la fréquence du réseau est de 50 Hz, resp. 60 Hz. Le di­viseur 21 délivre des signaux de fréquence de répétition 1 Hz à un circuit 22 de commande des segments 1 de l'affichage binaire 19 affichant les secondes (champ III de la figure 1). Le circuit 22 délivre en outre une impulsion par minute au circuit 23 de commande des segments 1 de l'affichage des minutes (champ II de la figure 1). Le circuit 23 est couplé au circuit 24 de commande des segments 1 de l'affichage des heures (champ I de la figure 1) lui-même connecté au circuit 25 de commande d'un affichage AM/PM.FIG. 4 shows a more detailed block diagram of electronics which do not include reversing the direction of reading of the bits. Circuit 20 is a supply circuit which also produces synchronous rectangular pulses with the frequency of the network. These signals are delivered to a frequency divider 21 by 50, resp. par 60 depending on the regions in which the network frequency is 50 Hz, resp. 60 Hz. The divider 21 delivers 1 Hz repetition frequency signals to a circuit 22 for controlling the segments 1 of the binary display 19 displaying the seconds (field III of FIG. 1). The circuit 22 also delivers one pulse per minute to the circuit 23 for controlling the segments 1 of the minutes display (field II of FIG. 1). The circuit 23 is coupled to the circuit 24 for controlling the segments 1 of the hour display (field I of FIG. 1) itself connected to the circuit 25 for controlling an AM / PM display.

Pour l'affichage digital, l'information de commande des minutes et des heures de l'affichage binaire 19 est délivrée à un multiplexeur digital 26 qui est commandé par un sélecteur de digit 27 commandé lui-même par un générateur de base de temps 28. Les signaux du généra­teur 28 sont des impulsions d'horloge pour le sélecteur de digit 27. Le multiplexeur 26 est informé du digit sélectionné et du temps à afficher (minutes et heures). Ces deux informations sont nécessaires pour déterminer le digit à afficher et elles sont délivrées au circuit de codage 29 pour la commande correcte des segments de l'affichage digital 30. Un nouveau digit est formé à chaque nouvelle impulsion d'horloge et le cycle est suffisamment rapide pour éviter tout scintillement de l'affichage 30.For digital display, the control information for the minutes and hours of the binary display 19 is delivered to a digital multiplexer 26 which is controlled by a digital selector 27 itself controlled by a time base generator 28. The signals from generator 28 are clock pulses for the digit selector 27. The multiplexer 26 is informed of the selected digit and of the time to be displayed (minutes and hours). These two pieces of information are necessary to determine the digit to be displayed and they are supplied to the coding circuit 29 for the correct control of the segments of the digital display 30. A new digit is formed with each new clock pulse and the cycle is sufficient fast to avoid flickering of the display 30.

L'invention ne s'applique pas exclusivement aux horlo­ges, mais à toute pièce d'horlogerie telle que montre, montre-bracelet, réveil, etc.The invention does not apply exclusively to clocks, but to any timepiece such as a watch, wristwatch, alarm clock, etc.

Claims (10)

1. Horloge binaire comprenant des moyens électroniques de mesure du temps, caractérisée en ce que lesdits moyens électroniques (9,10,17,18;20-29) commandent au moins un affichage binaire (19) du temps.1. Binary clock comprising electronic time measurement means, characterized in that said electronic means (9,10,17,18; 20-29) control at least one binary display (19) of time. 2. Horloge selon la revendication 1, caractérisée en ce que l'affichage binaire (19) comporte des zones d'affi­chage (I,II,III) prévues resp. pour afficher les diffé­rents paramètres du temps tels que les heures, minutes et secondes.2. Clock according to claim 1, characterized in that the binary display (19) comprises display areas (I, II, III) provided resp. to display the different time parameters such as hours, minutes and seconds. 3. Horloge selon la revendication 2, caractérisée en ce que chaque zone (I,II,III) comprend des segments (1) représentant les bits de l'affichage binaire chaque segment (1) étant porteur d'éléments d'affichage (2,3) destinés à indiquer la valeur 0 ou L et le poids 2n des segments.3. Clock according to claim 2, characterized in that each zone (I, II, III) comprises segments (1) representing the bits of the binary display each segment (1) carrying display elements (2 , 3) intended to indicate the value 0 or L and the weight 2 n of the segments. 4. Horloge selon l'une des revendications 1 à 3, caractérisée en ce que les éléments d'affichage sont electro-mécaniques, à diodes electroluminescentes LED, à cristal liquide LCD, au néon, à fluorescence à vide, à laser, à tube cathodique CRT ou à incandescence.4. Clock according to one of claims 1 to 3, characterized in that the display elements are electro-mechanical, LED light-emitting diodes, LCD liquid crystal, neon, vacuum fluorescence, laser, tube cathodic CRT or incandescent. 5. Horloge selon l'une des revendications 3 ou 4, caractérisée en ce que les éléments d'affichage sont des diodes électroluminescentes, des moyens optiques (5,8) étant prévus pour diffuser la lumière dans le sens des segments (1).5. Clock according to one of claims 3 or 4, characterized in that the display elements are light emitting diodes, optical means (5,8) being provided for diffusing the light in the direction of the segments (1). 6. Horloge selon la revendication 1, caractérisée en ce que les moyens électroniques comprennent un oscillateur à quartz (9), un diviseur de fréquence (10), un commu­tateur (17) du sens de lecture des bits affichés et une logique (18) commandant l'activation des éléments (2,3) de l'affichage (19).6. Clock according to claim 1, characterized in that the electronic means comprise a quartz oscillator (9), a frequency divider (10), a switch (17) of the direction of reading of the displayed bits and a logic (18) controlling the activation of the elements (2,3) of the display (19). 7. Horloge selon la revendication 1, caractérisé en ce qu'elle comporte en outre au moins un affichage digital (12,30) ou analogique (14) de l'heure incorporé à l'affi­chage binaire (19) ou séparé de celui-ci.7. Clock according to claim 1, characterized in that it further comprises at least one digital display (12,30) or analog (14) of the time incorporated in the binary display (19) or separated from it- this. 8. Horloge selon la revendication 7, caractérisée en ce que l'affichage digital (12) ou analogique (14) est commutable (13,16).8. Clock according to claim 7, characterized in that the digital (12) or analog (14) display is switchable (13,16). 9. Horloge selon la revendication 1, caractérisée en ce que l'affichage binaire indique aussi les heures AM/PM.9. Clock according to claim 1, characterized in that the binary display also indicates the hours AM / PM. 10. Utilisation de l'affichage binaire selon la revendi­cation 1 pour toute pièce d'horlogerie telle que montre, montre-bracelet, réveil, etc.10. Use of the binary display according to claim 1 for any timepiece such as a watch, wristwatch, alarm clock, etc.
EP88810414A 1988-01-19 1988-06-16 Binary clock Withdrawn EP0327787A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CH17888 1988-01-19
CH178/88 1988-01-19

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EP (1) EP0327787A1 (en)
JP (1) JPH01221696A (en)
KR (1) KR890012205A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10003980A1 (en) * 2000-01-29 2001-08-09 Stefan Rautenhaus Digital display for time and or date in which the data are displayed using binary, octal or hexidecimal numbering systems to reduce the number of line segments necessary to display the time and date
DE102004058245A1 (en) * 2004-12-02 2006-06-08 Städtler, Marc-Michael, Dipl.-Ing. Analog / digital time indicator
WO2006136587A2 (en) * 2005-06-23 2006-12-28 Tag Heuer Sa Device for displaying digital and alphanumeric symbols
CN110579958A (en) * 2019-07-17 2019-12-17 上海应用技术大学 binary time display body

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3284715A (en) * 1963-12-23 1966-11-08 Rca Corp Electronic clock
US3750384A (en) * 1971-08-13 1973-08-07 A Miller Electric chronometer with binary readout
US3841082A (en) * 1972-01-13 1974-10-15 H Jones Binary clock
FR2400240A1 (en) * 1977-08-12 1979-03-09 Blaupunkt Werke Gmbh Segment digital display for radio and TV receivers - can display analog valve by actuating horizontally adjacent segments
JPS58151579A (en) * 1982-03-04 1983-09-08 Sanyo Electric Co Ltd Electronic sandglass
US4702615A (en) * 1986-12-24 1987-10-27 Karel Havel Analog display timepiece
EP0274172A1 (en) * 1987-01-08 1988-07-13 Murry Alexander Norman Binary displays

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4942292A (en) * 1972-08-23 1974-04-20
JPS5489772A (en) * 1977-12-27 1979-07-17 Casio Comput Co Ltd Display device
JPS59112274A (en) * 1982-12-18 1984-06-28 Akihiro Itou Electronic timepiece with analog and digital time display

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3284715A (en) * 1963-12-23 1966-11-08 Rca Corp Electronic clock
US3750384A (en) * 1971-08-13 1973-08-07 A Miller Electric chronometer with binary readout
US3841082A (en) * 1972-01-13 1974-10-15 H Jones Binary clock
FR2400240A1 (en) * 1977-08-12 1979-03-09 Blaupunkt Werke Gmbh Segment digital display for radio and TV receivers - can display analog valve by actuating horizontally adjacent segments
JPS58151579A (en) * 1982-03-04 1983-09-08 Sanyo Electric Co Ltd Electronic sandglass
US4702615A (en) * 1986-12-24 1987-10-27 Karel Havel Analog display timepiece
EP0274172A1 (en) * 1987-01-08 1988-07-13 Murry Alexander Norman Binary displays

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN, vol. 7, no. 274 (P-241)[1419], 7 décembre 1983; & JP-A-58 151 579 (SANYO DENKI K.K.) 08-09-1983 *

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10003980A1 (en) * 2000-01-29 2001-08-09 Stefan Rautenhaus Digital display for time and or date in which the data are displayed using binary, octal or hexidecimal numbering systems to reduce the number of line segments necessary to display the time and date
DE102004058245A1 (en) * 2004-12-02 2006-06-08 Städtler, Marc-Michael, Dipl.-Ing. Analog / digital time indicator
WO2006136587A2 (en) * 2005-06-23 2006-12-28 Tag Heuer Sa Device for displaying digital and alphanumeric symbols
WO2006136587A3 (en) * 2005-06-23 2007-04-19 Tag Heuer Sa Device for displaying digital and alphanumeric symbols
CN101203814B (en) * 2005-06-23 2010-10-27 Lvmh瑞士制造业股份公司 Device for displaying digital or alphanumeric symbols
CN110579958A (en) * 2019-07-17 2019-12-17 上海应用技术大学 binary time display body

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KR890012205A (en) 1989-08-25
JPH01221696A (en) 1989-09-05

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