EP0298988A1 - Arrangement for communicating a program from a host computer to a target computer - Google Patents

Arrangement for communicating a program from a host computer to a target computer

Info

Publication number
EP0298988A1
EP0298988A1 EP19870902846 EP87902846A EP0298988A1 EP 0298988 A1 EP0298988 A1 EP 0298988A1 EP 19870902846 EP19870902846 EP 19870902846 EP 87902846 A EP87902846 A EP 87902846A EP 0298988 A1 EP0298988 A1 EP 0298988A1
Authority
EP
European Patent Office
Prior art keywords
microcomputer
program
board
equipment
computer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP19870902846
Other languages
German (de)
French (fr)
Inventor
Bengt Conradi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TELEVERKETS HUVUDKONTOR
Original Assignee
TELEVERKETS HUVUDKONTOR
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TELEVERKETS HUVUDKONTOR filed Critical TELEVERKETS HUVUDKONTOR
Publication of EP0298988A1 publication Critical patent/EP0298988A1/en
Withdrawn legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/36Preventing errors by testing or debugging software
    • G06F11/362Software debugging
    • G06F11/3648Software debugging using additional hardware

Definitions

  • the present invention relates to an arrangement for eliminating the need of connecting and utilizing a separate emulator between a host computer and a first microcomputer in connection with developing in the host computer a program intended for the first microcomputer. After programming the host computer the program is communicated to the first microcomputer, whereby a fault location is to be carried out in the communicated program.
  • test overhead the quality of not inappropriately loading the program during the fault location therein
  • a well-known separate emulator has the configuration of a double-process system, in which the system is run with one processor and supervised and tested with the second microcomputer.
  • What can thereby be considered characterizing for the new arrangement is that it comprises a multiprocessor bus to which the first microcomputer is connected or connectable and that there is applied on a board an equipment provided with a second microcomputer and executing the fault location, the equipment by inserting the board in a used board holder being connectable with said bus so that the program communicated in the first microprocessor is fault locationable by means of the second microcomputer while running the first microcomputer.
  • said equipment in the board should comprise a function for detecting the function course of the first microcomputer so that setting of break points in the program of the first microcomputer can take place.
  • Said break points should, in a way known per se, consist of such entries in the program where the software performance characteristics is not being affected during the run.
  • the second microcomputer should be arranged to set physical addresses corresponding to the various parts of the program in the hardware of the first microcomputer.
  • ADVANTAGES Due to the invention an established multiprocessor bus system can be utilized. Examples of such systems are the commercially available systems "MULTIBUS" and "VME".
  • the fault location equipment applied on the board is easily connectable to the bus system, like the first microcomputer, and when running the first microcomputer its program developed in the host computer can be fault located by means of the fault location executing equipment on the board.
  • the last-mentioned equipment can be designed in a way known per se with a well-known hardware and a well-known program.
  • Fig. 1 in a skeleton diagram form discloses the connecting in connection with programming in a host computer a program for a target machine
  • Fig. 2 in a skeleton diagram form discloses the machine equipment in accordance with the invention, used in connection with the programming
  • Fig. 3 in a skeleton diagram form discloses the connection to a multiprocessor bus system of the microcomputer, the program of which is to be fault located and the fault location equipment included on the board characteristic of the invention.
  • a bigger computer e.g. a computer of the type VAX
  • a target computer 2 has the form of or comprises a first microcomputer 3.
  • the target computer and the microcomputer, respectively, can consist of units known per se.
  • Developing a program for the microcomputer 3 is carried out by programming in the computer 1 and the developed program is communicated via a connection 4, 4' to the first microcomputer 3 where it is to be tested with regard to faults. It is essential that the fault location in the program of the first microcomputer can be carried out during running the program in the first microcomputer so that the fault location is not experienced as affecting the run of the program. So far, there has for this purpose been utilized a separate emulator 5, which in a known embodiment comprises two microcomputers 6 and 7. The fault location is carried out in a way known per se and will therefore not be described more closely here. In accordance with the invention and Fig. 2, it should be possible to carry out a programming and a fault location despite the lack of the separate emulator 5.
  • the bigger computer 1 1 is connected to the target computer 2' and the first microcomputer 3', respectively, via the connection 4", correspondingly.
  • a special board 8 with equipment for the fault location function is included in the target computer 2' .
  • Said equipment is represented by a second microcomputer 9.
  • the fault location equipment comprises the hard ware and the program necessary for carrying out the fault location during running the first microcomputer 3' without the performance characteristics of the program of the first microcomputer being affected inappropriately.
  • a multiprocessor bus connection should be used.
  • a connection is designated 10.
  • the connection can consist of a bus connection known per se, e.g. of the type "MULTIBUS", "VME", etc.
  • the first microcomputer 3" is connected to the bus connection 10. This connection can be done in a way known per se, e.g. by inserting a board 3a (see Fig. 2) in a board holder in a way known per se.
  • the second microcomputer 9' is correspondingly connected to the connection by its board 8 being correspondingly inserted and connected.
  • the equipment on the board 8 comprises hardware and a program for detecting the function course of the first microcomputer and for setting break points in the program of the first microcomputer. This function and detection can be carried out in a way known per se.

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Multi Processors (AREA)

Abstract

L'agencement consiste à développer dans un ordinateur central (1, 1') un programme destiné à un premier micro-ordinateur (3, 3', 3''). Le programme développé est transmis au premier micro-ordinateur et on doit procéder à une localisation des défauts dans le programme communiqué pendant la marche simultanée du premier micro-ordinateur. Ce dernier est connecté à un bus de multiprocesseur (10). Un second micro-ordinateur (9, 9') est mis sous tension sur un module (8) constituant un matériel de localisation de défauts. Ledit matériel est raccordé au branchement du bus du multiprocesseur par introduction du module dans un porte-module en service. Le second micro-ordinateur peut être utilisé pour tester le programme en cours d'exécution dans le premier micro-ordinateur.The arrangement consists in developing in a central computer (1, 1 ') a program intended for a first microcomputer (3, 3', 3 ''). The developed program is transmitted to the first microcomputer and it is necessary to locate faults in the program communicated during the simultaneous operation of the first microcomputer. The latter is connected to a multiprocessor bus (10). A second microcomputer (9, 9 ') is powered up on a module (8) constituting fault location equipment. Said equipment is connected to the bus connection of the multiprocessor by introducing the module into a module holder in service. The second microcomputer can be used to test the program running in the first microcomputer.

Description

ARRANGEMENT FOR COMMUNICATING A PROGRAM FROM A HOST COMPUTER TO A TARGET COMPUTER
TECHNICAL FIELD The present invention relates to an arrangement for eliminating the need of connecting and utilizing a separate emulator between a host computer and a first microcomputer in connection with developing in the host computer a program intended for the first microcomputer. After programming the host computer the program is communicated to the first microcomputer, whereby a fault location is to be carried out in the communicated program.
PRIOR ART In developing microcomputer based real-time systems, a separate emulator has so far been used in connection with programming the microcomputer during a simultaneous test. The emulator has among other things the quality of not inappropriately loading the program during the fault location therein ("test overhead").
A well-known separate emulator has the configuration of a double-process system, in which the system is run with one processor and supervised and tested with the second microcomputer.
DESCRIPTION OF THE INVENTION TECHNICAL PROBLEM In developing a program there is a need for any kind of programming test support. The present-day emulator provides such a support. There is, however, a need for providing more technically simple and economic solutions for making possible a program development in a bigger computer of programs for a microcomputer simultaneously as an expedient fault location of the program in question can be effected. THE SOLUTION The present invention has as its main object to provide an arrangement solving the problems stated in the above paragraph. What can thereby be considered characterizing for the new arrangement is that it comprises a multiprocessor bus to which the first microcomputer is connected or connectable and that there is applied on a board an equipment provided with a second microcomputer and executing the fault location, the equipment by inserting the board in a used board holder being connectable with said bus so that the program communicated in the first microprocessor is fault locationable by means of the second microcomputer while running the first microcomputer.
In further developments of the inventive idea it is suggested that said equipment in the board should comprise a function for detecting the function course of the first microcomputer so that setting of break points in the program of the first microcomputer can take place. Said break points should, in a way known per se, consist of such entries in the program where the software performance characteristics is not being affected during the run. In a further preferred embodiment it is suggested that the second microcomputer should be arranged to set physical addresses corresponding to the various parts of the program in the hardware of the first microcomputer.
However, what can essentially be considered characterizing for the invention appears from the characterizing portion of the subsequent claim 1.
ADVANTAGES Due to the invention an established multiprocessor bus system can be utilized. Examples of such systems are the commercially available systems "MULTIBUS" and "VME". The fault location equipment applied on the board is easily connectable to the bus system, like the first microcomputer, and when running the first microcomputer its program developed in the host computer can be fault located by means of the fault location executing equipment on the board. The last-mentioned equipment can be designed in a way known per se with a well-known hardware and a well-known program.
DESCRIPTION OF THE DRAWINGS A presently suggested embodiment of an arrangement disclosing the characteristic features of the invention will be described below with reference to the enclosed drawings in which Fig. 1 in a skeleton diagram form discloses the connecting in connection with programming in a host computer a program for a target machine,
Fig. 2 in a skeleton diagram form discloses the machine equipment in accordance with the invention, used in connection with the programming, and Fig. 3 in a skeleton diagram form discloses the connection to a multiprocessor bus system of the microcomputer, the program of which is to be fault located and the fault location equipment included on the board characteristic of the invention.
THE PREFERRED EMBODIMENT
In Fig. 1 a bigger computer, e.g. a computer of the type VAX, is designated 1 and a target computer 2. The latter has the form of or comprises a first microcomputer 3. The target computer and the microcomputer, respectively, can consist of units known per se.
Developing a program for the microcomputer 3 is carried out by programming in the computer 1 and the developed program is communicated via a connection 4, 4' to the first microcomputer 3 where it is to be tested with regard to faults. It is essential that the fault location in the program of the first microcomputer can be carried out during running the program in the first microcomputer so that the fault location is not experienced as affecting the run of the program. So far, there has for this purpose been utilized a separate emulator 5, which in a known embodiment comprises two microcomputers 6 and 7. The fault location is carried out in a way known per se and will therefore not be described more closely here. In accordance with the invention and Fig. 2, it should be possible to carry out a programming and a fault location despite the lack of the separate emulator 5. The bigger computer 11 is connected to the target computer 2' and the first microcomputer 3', respectively, via the connection 4", correspondingly. In this case, a special board 8 with equipment for the fault location function is included in the target computer 2' . Said equipment is represented by a second microcomputer 9. The fault location equipment comprises the hard ware and the program necessary for carrying out the fault location during running the first microcomputer 3' without the performance characteristics of the program of the first microcomputer being affected inappropriately.
In accordance with the invention a multiprocessor bus connection should be used. In Fig. 3 such a connection is designated 10. The connection can consist of a bus connection known per se, e.g. of the type "MULTIBUS", "VME", etc. The first microcomputer 3" is connected to the bus connection 10. This connection can be done in a way known per se, e.g. by inserting a board 3a (see Fig. 2) in a board holder in a way known per se. Also the second microcomputer 9' is correspondingly connected to the connection by its board 8 being correspondingly inserted and connected.
The equipment on the board 8 comprises hardware and a program for detecting the function course of the first microcomputer and for setting break points in the program of the first microcomputer. This function and detection can be carried out in a way known per se.
In the second microcomputer 9, physical addresses in the program and hardware of the first microcomputer, corresponding to various parts of the program, can be detected on the bus connection also in a way known per se. In this way it is possible to get knowledge of the real appearance and structure of the hardware on the set physical adresses. The invention is not limited to the above exemplifying embodiment, but can be subjected to modifications within the scope of the subsequent claims and the inventive idea.

Claims

1. Arrangement for eliminating the need of connecting and utilizing between a host computer (1, 1') and a first microcomputer (3, 3', 3") a separate emulator (5) in connection with developing a program in the host computer (1, 1') intended for the first microcomputer (3, 3', 3") and communicating the program to the first microcomputer and fault location in the communicated program, c h a r a c t e r i z e d in that it comprises a multiprocessor bus (10), to which the first microcomputer (3, 3', 3") is connected, and in that there is applied on a board (8) an equipment provided with a second microcomputer and executing the fault location, the equipment by inserting the board in a used board holder being connectable to said bus (10) so that the program communicated in the first microcomputer (3, 31, 3") is fault locationable be means of the second micro computer (9) while running the first microcomputer.
2. Arrangement according to claim 1, c h a r a c t e r i z e d in that said equipment on the board (8) comprises a function for detecting the function course of the first micro computer for setting break points in the program of the first microcomputer, the break points constituting such entries in the program that the software performance characteristics is not being affected during the run.
3. Arrangement according to claims 1 or 2, c h a r a c t e r i z e d in that the second microcomputer (9) is arranged to indicate physical adresses corresponding to the various parts of the program in the hardware of the first microcomputer (3, 3', 3").
EP19870902846 1986-04-29 1987-04-27 Arrangement for communicating a program from a host computer to a target computer Withdrawn EP0298988A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
SE8601979A SE456781B (en) 1986-04-29 1986-04-29 DEVICE FOR TRANSFERING A PROGRAM FROM A VALUATION COMPUTER TO A TARGET COMPUTER AND TROUBLESHOOTING IN THE TRANSFERED PROGRAM
SE8601979 1986-04-29

Publications (1)

Publication Number Publication Date
EP0298988A1 true EP0298988A1 (en) 1989-01-18

Family

ID=20364383

Family Applications (1)

Application Number Title Priority Date Filing Date
EP19870902846 Withdrawn EP0298988A1 (en) 1986-04-29 1987-04-27 Arrangement for communicating a program from a host computer to a target computer

Country Status (4)

Country Link
EP (1) EP0298988A1 (en)
JP (2) JPH01502369A (en)
SE (1) SE456781B (en)
WO (1) WO1987006738A1 (en)

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4167781A (en) * 1976-10-12 1979-09-11 Fairchild Camera And Instrument Corporation Microprocessor system having a single central processing unit shared by a plurality of subsystems each having a memory
US4428044A (en) * 1979-09-20 1984-01-24 Bell Telephone Laboratories, Incorporated Peripheral unit controller
EP0062978A3 (en) * 1981-04-06 1982-12-22 Secretary of State for Industry in Her Britannic Majesty's Gov. of the United Kingdom of Great Britain and Northern Ireland Apparatus for assisting fault-finding in data processing systems
JPS5981750A (en) * 1982-06-24 1984-05-11 Fuji Electric Co Ltd Multi-processor system

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO8706738A1 *

Also Published As

Publication number Publication date
SE8601979D0 (en) 1986-04-29
JPH081629U (en) 1996-11-29
WO1987006738A1 (en) 1987-11-05
JPH01502369A (en) 1989-08-17
SE456781B (en) 1988-10-31
SE8601979L (en) 1987-10-30

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