EP0290692B1 - Apparatus for heating semiconductor wafers - Google Patents

Apparatus for heating semiconductor wafers Download PDF

Info

Publication number
EP0290692B1
EP0290692B1 EP19870304297 EP87304297A EP0290692B1 EP 0290692 B1 EP0290692 B1 EP 0290692B1 EP 19870304297 EP19870304297 EP 19870304297 EP 87304297 A EP87304297 A EP 87304297A EP 0290692 B1 EP0290692 B1 EP 0290692B1
Authority
EP
European Patent Office
Prior art keywords
lamps
array
wafer
group
temperature
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
EP19870304297
Other languages
German (de)
French (fr)
Other versions
EP0290692A1 (en
Inventor
Anita S. Gat
Eugene R. Westerberg
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AG Processing Technologies Inc
Original Assignee
AG Processing Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to US06/760,160 priority Critical patent/US4680451A/en
Application filed by AG Processing Technologies Inc filed Critical AG Processing Technologies Inc
Priority to DE19873787367 priority patent/DE3787367T2/en
Priority to EP19870304297 priority patent/EP0290692B1/en
Publication of EP0290692A1 publication Critical patent/EP0290692A1/en
Application granted granted Critical
Publication of EP0290692B1 publication Critical patent/EP0290692B1/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • FMECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F27FURNACES; KILNS; OVENS; RETORTS
    • F27DDETAILS OR ACCESSORIES OF FURNACES, KILNS, OVENS, OR RETORTS, IN SO FAR AS THEY ARE OF KINDS OCCURRING IN MORE THAN ONE KIND OF FURNACE
    • F27D99/00Subject matter not provided for in other groups of this subclass
    • F27D99/0001Heating elements or systems
    • F27D99/0006Electric heating elements or system
    • FMECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F27FURNACES; KILNS; OVENS; RETORTS
    • F27BFURNACES, KILNS, OVENS, OR RETORTS IN GENERAL; OPEN SINTERING OR LIKE APPARATUS
    • F27B5/00Muffle furnaces; Retort furnaces; Other furnaces in which the charge is held completely isolated
    • F27B5/06Details, accessories, or equipment peculiar to furnaces of these types
    • F27B5/14Arrangements of heating devices
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B3/00Ohmic-resistance heating
    • H05B3/0033Heating devices using lamps
    • H05B3/0038Heating devices using lamps for industrial applications
    • H05B3/0047Heating devices using lamps for industrial applications for semiconductor manufacture
    • FMECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F27FURNACES; KILNS; OVENS; RETORTS
    • F27DDETAILS OR ACCESSORIES OF FURNACES, KILNS, OVENS, OR RETORTS, IN SO FAR AS THEY ARE OF KINDS OCCURRING IN MORE THAN ONE KIND OF FURNACE
    • F27D19/00Arrangements of controlling devices
    • F27D2019/0003Monitoring the temperature or a characteristic of the charge and using it as a controlling value
    • FMECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F27FURNACES; KILNS; OVENS; RETORTS
    • F27DDETAILS OR ACCESSORIES OF FURNACES, KILNS, OVENS, OR RETORTS, IN SO FAR AS THEY ARE OF KINDS OCCURRING IN MORE THAN ONE KIND OF FURNACE
    • F27D19/00Arrangements of controlling devices
    • F27D2019/0093Maintaining a temperature gradient

Description

  • This invention relates generally to apparatus for heating semiconductor wafers.
  • High intensity lamp heaters are now available for heat treating semiconductor wafers. For example, the Heat-PulseTM system manufactures and sold by AG Associates, Palo Alto, California permits fast ramping of temperatures to 1100°C, and the maintenance of this temperature for a period of 10 seconds or so for the rapid annealing of ion implanted semiconductor wafers. The temperature is then quickly lowered thereby minimizing the movement of dopant ions in the crystal lattice structure. The same apparatus could be used for phosphorous doped oxide reflow, metal silicide formation, annealing, and other semiconductor applications.
  • When heat treating semiconductor wafers at a temperature of 1100°C or above, uniformity of heating is important to prevent thermally induced stresses and resulting slippage in the crystal structure. Heretofore, banks of lamps above and below the wafer all aligned in parallel have been used to heat the wafers. The current in each lamp is controlled to try and maintain some uniformity of temperature with the apparatus. However, maintenance of uniform temperature has not been possible due to the reradiated heat near the edges of the wafer, thus leding to a temperature gradient near the edges of the wafer. Attempts at overcoming this problem have included use of a supplementary lamp with generally circular configuration which surrounds the wafer in close proximity to the wafer edges. In addition to the increased complexity of the lamp heating array, an obvious limitation of using the supplementary lamp is the restriction of the lamp to one diameter size of wafer. However, in actual practice wafers of varying diameters, from 7.5 cms (3 inches) to 15 cms (6 inches) must be accommodated.
  • Document US-A-3,836,751 discloses banks of lamps aligned in parallel above and below the wafers with means electrically connecting adjacent lamps into groups to reduce the complexity and resolution of heat control.
  • According to this invention there is provided apparatus for heating semiconductor wafers, comprising a first array of lamps; a second array of lamps, spaced from said first array whereby a semiconductor wafer can be positioned therebetween; means electrically connecting groups of lamps in said first array and means electrically connecting groups of lamps in said second array; characterized in that each said group comprises lamps equally positioned from respective ends of the array of which they form a part; and in that each group of lamps in said first array is electrically connected with a group of lamps in said second array whereby the interconnected groups of lamps are simultaneously and equally energized.
  • The invention provides a high temperature lamp heating apparatus which is readily controllable in heating wafers of various diameters, and which minimizes any temperature gradient along the wafer edges.
  • To maintain a generally uniform temperature across a wafer of any size, the lamps in each plurality are energized in groups of two or more, with a group in one plurality being interconnected for energization with a group in the other plurality whereby the two groups of lamps can be simultaneously and equally energized. Preferably the lamps are so connected to provide a plurality of heating zones extending outwardly. For example, the lamps in each group can have the same position from opposite ends of the plurality of which they are part. Since the groups of lamps are independently controlled, heat near the edge of a wafer can be increased to minimize temperature gradients in the wafer.
  • The electrical power to the lamps can be controlled in accordance with preestablished lamp current for obtaining a desired temperature for a specific size of wafer. Alternatively, sensors can be provided to sense the temperature of the heated wafer and provide feedback for automatically controlling the lamp groups. Additionally, a desired temperature gradient profile can be established by adjusting the relative power of the groups of lamps through judicious selection of the individual lamps as to power rating.
  • The invention will now be described by way of example with reference to the drawings, in which:-
    • Figure 1 is an exploded perspective view of an apparatus in accordance with the invention;
    • Figure 2 is a side view of the apparatus of Figure 1;
    • Figure 3 is a top schematic view of the two pluralities of lamps of Figure 1 illustrating the positioning of a wafer therebetween and the energization of the lamps in pairs;
    • Figure 4 is a schematic diagram illustrating the energization of two pairs of lamps of the arrangement of Figure 2; and
    • Figure 5 is a functional block diagram of control circuitry for controlling the pluralities of lamps in an apparatus as shown in Figure 1.
  • Referring now to the drawings, Figure 1 is an exploded perspective view of one embodiment of heating apparatus in accordance with the invention. A first plurality of elongate lamps shown generally at 30 and numbered 1 - 10 are provided above a wafer 40, and a second plurality of elongate lamps shown generally at 32 and numbered 11 - 20 are provided below the wafer 40. The lamps 1 to 20 may be conventional tungsten halogen lamps. A light reflector 34 is positioned below the plurality of lamps 32, and a light reflector 36 is positioned above the plurality of lamps 30. Two temperature sensors 38 are positioned in reflector 34 for sensing the temperature of the heated wafer 40. Suitable sensors are optical pyrometer thermometers manufactured and sold by I. R. Con, Inc. of Skokie, Illinois.
  • Figure 2 is a side view of the apparatus of Figure 1, and further illustrates the positioning of the wafer 40 between the pluralities of lamps 30 and 32. One of the sensors 38 is positioned beneath the center of the wafer 40 and the other sensor 38 is positioned near the edge of the wafer 40.
  • Figure 3 is a top plan view of the two pluralities of lamps with the wafer 40 positioned therebetween and in alignment with an orthogonal criss-cross arrangement of the lamps of the two pluralities. As shown, the lamps in each plurality are paired beginning with the outermost lamps 1, 10 and 11, 20 and working inwardly to the innermost pair of lamps 5, 6 and 15, 16. Corresponding pairs of lamps in the two pluralities are then connected together in parallel for simultaneous and equal energization. For example, as shown in Figure 3 the two lamps 3, 8 in the top plurality 30 of lamps are connected with the corresponding pair of lamps 13, 18 of the bottom plurality 32 of lamps with the four lamps being connected in parallel for simultaneous energization by power control unit 42.
  • In one mode of operation, power through the lamps is controlled by phase modulating a voltage having a constant peak amplitide, or controlling the duty cycle thereof. The voltage applied to the pairs of lamps can be preestablished for each size wafer and for a particular heat treatment. For example, heat treating of a 10cm (four inch) diameter wafer where the temperature is ramped up to 700°C in three seconds, maintained in a steady state for ten seconds, and then ramped down in three seconds can be in accordance with the following table:
    Figure imgb0001
  • This loop system using predetermined current for the lamps may provide an annealing temperature of 700°C plus or minus 7°C for the ten second steady state. For other sized wafers and for other temperature annealing patterns the normalized current intensity will vary.
  • Otherwise the temperature sensors 38 shown in Figure 2 can provide a feedback for computer control of the lamp currents. Figure 5 is a functional block diagram of control apparatus in which the sensors 38 are employed. Signals from the temperature sensors 38 are suitably conditioned at 44 and applied through a multiplexer 46 to an analog to digital converter 48. The digital signals from converter 48 are then applied to a microprocessor 50 which is suitably programmed to respond to the sensed temperature and control timers 52 and phase controllers 54 in energizing the pluralities (banks) of lamps 56. This closed system employing the temperature sensors 38 can more readily vary the temperature profiles used in heat treating a wafer. Greater control can be realized by employing more than two temperature sensors.
  • In alternative modes of operation, a single center sensor can be employed for dynamically controlling the central group of lamps. The other groups of lamps can have a predetermined offset from the intensity of the central groups with the other groups automatically changing as the central group is changed in intensity.
  • Using the two sensors 38 the central sensor can control the central group of lamps, while the temperature differential between the two sensors controls the offset of the outer groups of lamps.
  • In another mode of operation, the groups of lamps can have different steady state intensities for a give voltage thereby establishing a desired temperature gradient. Each wafer size can be provided with a specific gradient which is not dependent on electronic control.
  • Heating apparatus utilizing high intensity CW lamps as described above can provide accurate control of the temperature in a wafer, and maintian desired temperature gradients therein. Use of the temperature sensors and feedback provides greater versatility in controlling the temperature profiles in heat treating a wafer; otherwise a proper selection of lamps can provide a desired temperature gradient without need for electronic control.

Claims (11)

  1. Apparatus for heating semiconductor wafers, comprising a first array (30) of lamps (1 to 10); a second array (32) of lamps (11 to 20), spaced from said first array whereby a semiconductor wafer (40) can be positioned therebetween; means electrically connecting groups of lamps (eg. 3 and 8) in said first array (30) and means electrically connecting groups of lamps (eg. 13 and 18) in said second array (32); characterized in that each said group comprises lamps equally positioned from respective ends of the array of which they form a part; and in that each group of lamps (eg. 3 and 8) in said first array (30) is electrically connected with a group of lamps (eg. 13 and 18) in said second array (32) whereby the interconnected groups of lamps (eg. 3 and 8; 13 and 18) are simultaneously and equally energized.
  2. Apparatus as claimed in Claim 1, characterised in that the lamps (1 to 10; 11 to 20) in each plurality (30; 32) are elongate and parallel, with the lamps of one plurality being skewed with respect to the lamps of the other plurality.
  3. Apparatus as claimed in Claim 2, characterised in that the lamps (1 to 10) of the first plurality (30) are arranged orthogonally with respect to the lamps (11 to 20) of the second plurality (32).
  4. Apparatus as claimed in any preceding claim, characterised in that the lamps (3 and 8; 13 and 18) in each group are connected in parallel.
  5. Apparatus as claimed in Claim 4, characterised in that the lamps (3, 8, 13, 18) in interconnected groups are connected in parallel.
  6. Apparatus as claimed in any preceding claim, characterised in that each group of lamps (3 and 8; 13 and 19) consists of two lamps.
  7. Apparatus as claimed in any preceding claim, characterised by control means for controlling the power supplied to the interconnected groups of lamps whereby a desired temperature can be maintained when heating a wafer (40) between said first plurality (30) of lamps (1 to 10) and said second plurality (32) of lamps (11 to 20).
  8. Apparatus as claimed in Claim 7, characterised in that said control means includes a voltage source and modulation means for modulating the duty cycle of voltage applied through interconnected groups of lamps.
  9. Apparatus as claimed in Claim 8, characterised in that said modulation means is controlled in accordance with preestablished duty cycles of current through said interconnected groups of lamps.
  10. Apparatus as claimed in Claim 8 or Claim 9, characterised by temperature sensing means (38) for sensing the temperature of a wafer (40) and computer control means (50) responsive to the sensed temperature for controlling said modulation means.
  11. Apparatus as claimed in any preceding claim, characterised in that the lamps in each group of lamps are selected to have different steady state power intensities for a given applied voltage thereby to establish a desired temperature gradient.
EP19870304297 1985-07-29 1987-05-14 Apparatus for heating semiconductor wafers Expired - Lifetime EP0290692B1 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
US06/760,160 US4680451A (en) 1985-07-29 1985-07-29 Apparatus using high intensity CW lamps for improved heat treating of semiconductor wafers
DE19873787367 DE3787367T2 (en) 1987-05-14 1987-05-14 Heater for semiconductor wafers.
EP19870304297 EP0290692B1 (en) 1987-05-14 1987-05-14 Apparatus for heating semiconductor wafers

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP19870304297 EP0290692B1 (en) 1987-05-14 1987-05-14 Apparatus for heating semiconductor wafers

Publications (2)

Publication Number Publication Date
EP0290692A1 EP0290692A1 (en) 1988-11-17
EP0290692B1 true EP0290692B1 (en) 1993-09-08

Family

ID=8197911

Family Applications (1)

Application Number Title Priority Date Filing Date
EP19870304297 Expired - Lifetime EP0290692B1 (en) 1985-07-29 1987-05-14 Apparatus for heating semiconductor wafers

Country Status (2)

Country Link
EP (1) EP0290692B1 (en)
DE (1) DE3787367T2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4223133A1 (en) * 1991-07-15 1993-01-21 T Elektronik Gmbh As Rapid thermal processing of sensitive devices - using heat source programme control to avoid defects in e.g. semiconductor devices
US5359693A (en) * 1991-07-15 1994-10-25 Ast Elektronik Gmbh Method and apparatus for a rapid thermal processing of delicate components
FR2794054B1 (en) * 1999-05-31 2001-08-10 Faure Bertrand Equipements Sa METHOD AND DEVICE FOR ASSEMBLING A MATTRESS BY ADHESIVE WITH A SEAT COVER FOR A SEAT

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3836751A (en) * 1973-07-26 1974-09-17 Applied Materials Inc Temperature controlled profiling heater
JPS59928A (en) * 1982-06-25 1984-01-06 Ushio Inc Photo heating device
JPS5938584A (en) * 1982-08-30 1984-03-02 ウシオ電機株式会社 Method of operating irradiating heating furnace
JPS5959876A (en) * 1982-09-30 1984-04-05 Ushio Inc Operating method of light irradiation furnace
GB2136937A (en) * 1983-03-18 1984-09-26 Philips Electronic Associated A furnace for rapidly heating semiconductor bodies

Also Published As

Publication number Publication date
EP0290692A1 (en) 1988-11-17
DE3787367T2 (en) 1994-04-14
DE3787367D1 (en) 1993-10-14

Similar Documents

Publication Publication Date Title
US4680451A (en) Apparatus using high intensity CW lamps for improved heat treating of semiconductor wafers
US5016332A (en) Plasma reactor and process with wafer temperature control
EP0119654B1 (en) A furnace suitable for heat-treating semiconductor bodies
EP1046321B1 (en) Induction heating device and process for controlling temperature distribution
KR101017217B1 (en) Substrate heating apparatus with glass-ceramic panels and thin film ribbon heater element
TWI267160B (en) Method and apparatus for controlling the spatial temperature distribution across the surface of a workpiece support
KR970071993A (en) Substrate Temperature Control Method, Substrate Heat Treatment Apparatus and Substrate Support Apparatus
EP0471171A3 (en) Method and device for regulating and limiting the power of a heating plate made of ceramic or similar material
JPH1115537A (en) Temperature processor
EP0290692B1 (en) Apparatus for heating semiconductor wafers
US3859498A (en) Infrared radiation system
KR20050026968A (en) Induction hot plate comprising heating regions having a reconfigurable structure, and method for increasing the maximum power of said heating regions
US5700992A (en) Zigzag heating device with downward directed connecting portions
JPS63263719A (en) Heater for thermal treatment of semiconductor wafer
US5671323A (en) Zigzag heating device with downward directed connecting portions
JP3466673B2 (en) Vacuum furnace with movable heat reflector
DE69027317T3 (en) VACUUM OVEN
JP2000036469A (en) Heat treatment furnace for substrate
KR20030010824A (en) Bake equipment having a temperature compensation system
JP2579468Y2 (en) Ultra high temperature heating furnace
JPH0684869B2 (en) Resistance furnace using rod-shaped heating element
MXPA00005550A (en) Induction heating device and process for controlling temperature distribution
JPS61273888A (en) Induction heater
JPH04183868A (en) Heater
JPH06174376A (en) Heating apparatus and heating method in successive moving belt-furnace

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

AK Designated contracting states

Kind code of ref document: A1

Designated state(s): DE FR GB NL

17P Request for examination filed

Effective date: 19890404

RAP3 Party data changed (applicant data changed or rights of an application transferred)

Owner name: AG PROCESSING TECHNOLOGIES, INC.

17Q First examination report despatched

Effective date: 19920124

GRAA (expected) grant

Free format text: ORIGINAL CODE: 0009210

AK Designated contracting states

Kind code of ref document: B1

Designated state(s): DE FR GB NL

REF Corresponds to:

Ref document number: 3787367

Country of ref document: DE

Date of ref document: 19931014

ET Fr: translation filed
PLBE No opposition filed within time limit

Free format text: ORIGINAL CODE: 0009261

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT

26N No opposition filed
PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: GB

Payment date: 19950512

Year of fee payment: 9

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: FR

Payment date: 19950529

Year of fee payment: 9

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: NL

Payment date: 19950531

Year of fee payment: 9

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: DE

Payment date: 19950720

Year of fee payment: 9

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: GB

Effective date: 19960514

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: NL

Effective date: 19961201

GBPC Gb: european patent ceased through non-payment of renewal fee

Effective date: 19960514

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: FR

Effective date: 19970131

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: DE

Effective date: 19970201

NLV4 Nl: lapsed or anulled due to non-payment of the annual fee

Effective date: 19961201

REG Reference to a national code

Ref country code: FR

Ref legal event code: ST