EP0229986A2 - Circuit de curseur pour une mémoire à deux entrées - Google Patents

Circuit de curseur pour une mémoire à deux entrées Download PDF

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Publication number
EP0229986A2
EP0229986A2 EP86117314A EP86117314A EP0229986A2 EP 0229986 A2 EP0229986 A2 EP 0229986A2 EP 86117314 A EP86117314 A EP 86117314A EP 86117314 A EP86117314 A EP 86117314A EP 0229986 A2 EP0229986 A2 EP 0229986A2
Authority
EP
European Patent Office
Prior art keywords
cursor
image data
data
display
port
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP86117314A
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German (de)
English (en)
Other versions
EP0229986A3 (en
EP0229986B1 (fr
Inventor
John Stephen Muhich
Joseph Stoddard Thornley
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
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International Business Machines Corp
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Filing date
Publication date
Priority claimed from US06/820,487 external-priority patent/US4767460A/en
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of EP0229986A2 publication Critical patent/EP0229986A2/fr
Publication of EP0229986A3 publication Critical patent/EP0229986A3/en
Application granted granted Critical
Publication of EP0229986B1 publication Critical patent/EP0229986B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/08—Cursor circuits

Definitions

  • This invention relates to video display systems and more specifically to a video display system providing all-points-­addressable functions implemented using dual ported memory.
  • Video display screens typically provide a movable marker, referred to as a cursor, to provide a visible indication as to the current position of interest on the display screen.
  • a cursor a movable marker
  • this function has been implemented by either the host system or the display logic circuitry.
  • Lower cost, lower performance systems have used software to create and manage the cursor while more performance oriented systems have used more expensive logic circuits with the intention of minimizing system software overhead.
  • U. S. Patent No. 3,903,510 entitled “Scrolling Circuit for a Visual Display Apparatus” to Teletype Corporation discloses a circuit for addressing a storage memory to display data in a manner to combine a cursor row address counter with the memory address counter.
  • a cursor generation circuit for an image display system includes a circuit for storing image data.
  • This circuit includes a first input/output port to provide access to the image data to the display system.
  • the storing circuit also includes a second input/output port to provide access to the image data to a display device for the purpose of outputting the display data to be displayed on the display device.
  • a combining circuit is provided to combine the image data and the storing circuit with cursor data for the display device when the display device is accessing the storing circuit through the second input/output port. The combining circuit further removes the cursor data from the image data when the storing device is being accessed through the first port.
  • the invention includes a dual port random access memory that provides a display system with read/write access to the memory through a first port.
  • the second port is a parallel in, serial out port to provide an image data serial bit stream to a display device.
  • a processor is connected to the memory to provide cursor data in the image data storage of memory during access by the display device through this second port. This cursor data is removed from the image data when the memory is being accessed through the first port. The cursor data is, therefore, transparent to the display system accessing the image memory.
  • a cursor function implemented in logic circuits is highly desirable in high performance video display systems to mini­mize system software overhead. Typical implementations of this function, however, are relatively expensive. This invention provides the desired cursor function, in a unique way and with very low circuitry cost.
  • Basic video formatting in a raster based video display system consists of reading each scan line of the bit map, a memory which contains the display image, serializing the bit map in synchronization with the electron beam scanning of the display screen, and outputting the resultant serial data stream to control the beam intensity.
  • Each bit of the bit map is called a pixel and is the smallest addressable display element on the screen or in bit map.
  • Video formatting in this display is controlled by the scan line counter.
  • the counter is incremented after the writing of each scan line to the screen and is reset at the end of every frame.
  • the counter thus describes the current Y position that is being written on the screen at any instant in time.
  • the cursor is generated during the video formatting operation. In Figure 1, this is accomplished by a micro-pro­cessor 6 executing microcode.
  • the cursor position on the screen is defined by two registers, the X cursor position register 13 and the Y cursor position register 14. These registers 13 and 14 are loaded and maintained by the host system in accordance with the desired screen position of the cursor, representing X and Y screen coordinates respectively.
  • a comparison of the Y cursor position register 14 with the scan line counter 16 determines whether video formatting is within the range of the cursor 15.
  • the actual size and shape of the cursor image is defined by the host system and is programmable within certain limita­tions.
  • the host system establishes the pattern of pixels to be used as the cursor, and stores that pattern within a specific rectangular block of bits in a portion of the bit map 8 that is not visible on screen (the hidden area).
  • the size and shape of the stored pattern is limited only in that it must lie within the specified rectangle.
  • This invention manipulates the entire rectangle as though it were the cursor. This entire area of the cursor pattern is logically combined with the corresponding displayable area of the bit map 7 to produce the desired cursor on the screen.
  • VIDEO RAM configured in a manner disclosed in U. S. Patent Application Serial No. 701,328 filed February 13, 1985 and herein incor­porated by reference, and micro-processor.
  • the video RAM would be a Texas Instrument TMS 4161.
  • the VIDEO RAM as configured will be referred to as a bit addressable multi-dimensional array memory or BAMDA.
  • Cursor processing begins one scan line before the line in which the cursor is to be displayed. This step in cursor processing is termed "preconstruction of the cursor".
  • a cursor image is created by steps 56-68, by logically combining the cursor pattern(s) ( Figure 3) 22a and 22b with the bit map data at the location 21 in which the cursor is to be displayed. This process is done one line at a time for each scan line 18 and the respective cursor pattern line 20a and 20b as the video formatting proceeds from scan line to scan line down the bit map.
  • the resultant pattern is stored in an assigned cursor save area 17 in the hidden bit map 8. This process does not preconstruct more than one line of cursor image at a time. However, one skilled in the art could preconstruct the entire cursor image before it is needed by the video formatter.
  • the cursor save image 17 is exchanged with the bit map data 19 of the scan line 18 at the horizontal position 21 in which the cursor pattern is to appear.
  • the entire scan line 18 is loaded into the Video RAM serial output port ( Figure 1) 12. It is important to note that this load opera­tion takes only one memory cycle to load the entire scan line 18 of the 1024 pixels. This is accomplished very rapidly by virtue of the video ram serial output port 12.
  • the serial video output data stream contains a cursor image, combined with the bit map data, and thus appears on the display screen as if the cursor pattern were actually merged into the display bit map.
  • the original scan line is restored to its original state using the memory data bits which the exchange operation saved, thus preserving the bit map data.
  • the above invention provides the following functions with minimal circuitry cost and system overhead:
  • Figure 1 is a block diagram of the display system con­taining the present invention.
  • the bit map 1 is a special BAMDA memory array organized as 1024 lines of 1024 bits each.
  • the bit map 1 possesses the following special property: it is accessible from one to sixteen bits at a time, with the resultant access beginning on any arbitrary bit boundary and extending for one to sixteen bits in either the vertical (down) or horizontal (right) direction.
  • the starting point for BAMDA access is specified by an X register 2 and a Y register 3, providing a ten bit X and Y rectilinear coordinate respectively on address lines 4 and 5.
  • Micro-processor 6 is a microprogrammed logic sequencer such as an Advanced Micro Devices part No. 29226. This micro-processor 6 includes a set of general purpose registers, an arithmetic/logic unit and a control unit. The micro-pro­cessor 6 is controlled in accordance with micro-instructions stored in high speed Read-Only-Memory (see Figure 4). The micro-processor 6 controls all display system operations including the reading and writing of data to and from the bit map 1. The micro-processor 6, through its registers and logic unit, also provides the ability to logically modify the contents of bit map 1 or the data being written or read by the system software.
  • the bit map 1 is divided into two logical areas, the visible display memory 7 and the hidden display memory 8.
  • visible bit map 7 is 768 lines of 1024 bits each and represents all of the bits that are direct­ly mapped to the display screen 10 as pixels, i.e. it is the visible bit map 7 with each bit corresponding to a specific pixel location of the display screen 10.
  • the hidden area 8 is the remaining 256 lines of 1024 bits each and is physically identical, and contiguous to the visible area 7 and also represents a bit map of pixels. The hidden area, however, is not scanned and mapped directly to the display.
  • System may read or modify the bit map 1 either by reading or writing the data register 9 directly, under control of the micro-processor 6, or by requesting the micro-processor 6 to perform a micro-coded sequence of operations in accordance with its pre-programmed micro instructions.
  • Figure 2 illustrates a classical prior art logic circuit approach to providing cursor control.
  • the cursor requires four components 28, 29, 30, and 31 that are not needed when the cursor is implemented as described in this invention.
  • Cursor control logic 30 uses the outputs of X and Y cursor position registers 28 and 29 to determine the precise time in which to merge the cursor pattern 31 into the serial video data 33. This merge process must be done with care to avoid skewing of the serial data.
  • Block 31 is a memory/register large enough to contain the cursor pattern. The point being, that there must be data available for insertion at all times without any latency.
  • Blocks 28 and 29 are registers loaded by system software. The contents of the two registers are used to position the cursor on the screen 32. These registers, like block 31, must have their outputs available to block 30 at all times. For this reason, registers 28 and 29 cannot reside in the hidden area 26 of the bit map.
  • FIG. 3 provides the additional details of the present invention.
  • the present invention provides complete cursor func­tioning with a minimum of circuitry.
  • the system must specify three pieces of information to enable the cursor to be displayed: 1. The exact nature of the cursor (size and shape). 2. The desired position of the cursor on the display screen. 3. The type of logical merge of the cursor pattern with the bit map pixels.
  • the size and shape is accomplished by writing a bit pattern in a specified, unused, area of the hidden bit map 8, called the cursor pattern area 22a and 22b. This operation need only be performed once unless the cursor pattern is to be changed or power removed from the bit map. Loading of the cursor pattern area can be accomplished via a write operation from the system I/O channel 11 or a copy from any other area of the bit map 1.
  • the maximum size of the cursor is limited by the size of the rectangular block of bits assigned to this function by the micro-processor 6 microcode.
  • the maximum horizontal assignable size is limited by the display circuit speed.
  • the width of the cursor dictates the number of bit map 1 memory cycles required to complete cursor processing. If the width of the cursor is excessive, severe timing problem occur.
  • the technique implemented is assumed to have a cursor pattern area 22a and 22b of sixty four lines of forty eight bits each. This allows a maximum cursor image on the display screen 10 of forty eight pixels wide by sixty four pixels high.
  • the precise location of the cursor is specified by the value contained in the two cursor position registers 13 and 14, which are two unused 16 bit words in the hidden bit map 8.
  • system software simply writes the required value to each of these fixed locations 13 and 14 in the hidden portion 8 of the bit map 1.
  • the micro-processor 6 treats these two locations as dedicated registers, the X cursor position register 13 and the Y cursor position register 14.
  • a 16 bit word location is assigned to hold the current scan line position pointer. This word is referred to as the "scan line counter" 16.
  • This register 16 which is used for cursor control and video processing, is cleared during verti­cal blanking period of the CRT, and incremented by 1 during each horizontal blanking period.
  • a cursor save area 17 must be dedicated in the hidden bit map to hold an preconstructed cursor scan line image.
  • This in the preferred embodiment, is a 48 bit wide by one bit high rectangular block and is used to store one line at a time of a cursor image.
  • the micro-processor 6 uses this area during cursor processing ( Figure 4).
  • Video formatting is controlled by the micro-processor 6 and consists primarily of managing the conversion of scan lines to serial video output data, timing and control of CRT synchronization signals.
  • Figure 4 illustrates the microcode executed by the micro-processor 6 during video formatting, the value of the scan line counter and the Y cursor position register are compared to detect cursor range 46. If the comparison shows that the cursor should start on the next scan line 18, then the bit map data 19 is logically combined with the cursor pattern 20a and 20b and stored in the cursor save area 17 of hidden memory 8. To accomplish this, the 48 bits 19 of the scan line that will be affected by the cursor are read from the visible bit map 7 and saved. That same data is then logically ANDed with cursor pattern 20a and then XORed with cursor pattern 20b and then the result is placed in the cursor save area 17. The starting bit 21 of the affected scan line area 19 is provided by the X cursor position register 13. Other ways and sequences of doing the logical function(s) should be apparent to those skilled in the art.
  • bit map data 19 has been fully merged with the cursor pattern 20a and 20b and is stored in the cursor save area 17.
  • the cursor image in the temporary save area 17 is exchanged with the bit map data 19. After the exchange, the merged bit map data and cursor image data reside in the scan line 18 that is to be displayed next.
  • the scan line 18 is now ready to be displayed on the screen and the entire scan line is loaded into the video RAM serial output port 12 during horizontal blanking. It is then serialized and sent to the display 10.
  • the bit map cannot be accessed by the host system. Because of this, the cursor does not appear, to the host system, to be in the bit map at all and gives the impression that the cursor is com­pletely controlled by logic circuits.
  • FIG. 4 The logical function of ANDing and XORing of the bit map data is illustrated in Figure 4.
  • This micro- code steps 56-68 are executed one scan line before it is to be serialized and displayed, i.e., when the previous scan line is being se­rialized and sent to the display 10. It is approximately 90% of the total time required for a complete horizontal period. Because of this long period of time, 90%, computation of the cursor pattern can be done in background mode. This is done ahead of time so it can be exchanged quickly during the Video Formatting period (horizontal blanking) which is approximately 10% of total time required to complete a horizontal period.
EP19860117314 1986-01-17 1986-12-12 Circuit de curseur pour une mémoire à deux entrées Expired - Lifetime EP0229986B1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US820487 1986-01-17
US06/820,487 US4767460A (en) 1985-01-29 1986-01-17 Cement compositions for cementing of wells enabling gas channelling in the cemented annulus to be inhibited by right-angle setting

Publications (3)

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EP0229986A2 true EP0229986A2 (fr) 1987-07-29
EP0229986A3 EP0229986A3 (en) 1989-12-27
EP0229986B1 EP0229986B1 (fr) 1994-03-02

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1989006030A1 (fr) * 1987-12-24 1989-06-29 Ncr Corporation Appareil generateur d'une forme de curseur sur un ecran d'affichage
GB2243521A (en) * 1990-04-11 1991-10-30 Afe Displays Ltd Image display system
GB2252224A (en) * 1990-12-12 1992-07-29 Apple Computer Providing an overlay e.g. a cursor, for a computer display

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4566000A (en) * 1983-02-14 1986-01-21 Prime Computer, Inc. Image display apparatus and method having virtual cursor

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4566000A (en) * 1983-02-14 1986-01-21 Prime Computer, Inc. Image display apparatus and method having virtual cursor

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
IBM TECHNICAL DISCLOSURE BULLETIN, vol. 26, no. 10B, March 1984, pages 5622-5623, New York, US; A.C. GAY: "Cursor display on raster graphic devices" *
IEEE COMPCON SPRING '85 DIGEST OF PAPERS, San Francisco, California, 25th-28th February 1985, pages 276-279, IEEE, New York, US; K. GUTTAG et al.: "New silicon to solve fundamental graphics problems" *

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1989006030A1 (fr) * 1987-12-24 1989-06-29 Ncr Corporation Appareil generateur d'une forme de curseur sur un ecran d'affichage
US4987551A (en) * 1987-12-24 1991-01-22 Ncr Corporation Apparatus for creating a cursor pattern by strips related to individual scan lines
AU611521B2 (en) * 1987-12-24 1991-06-13 Ncr Corporation Apparatus for generating a cursor pattern on a display
GB2243521A (en) * 1990-04-11 1991-10-30 Afe Displays Ltd Image display system
GB2243521B (en) * 1990-04-11 1993-12-08 Afe Displays Ltd Image display system
GB2252224A (en) * 1990-12-12 1992-07-29 Apple Computer Providing an overlay e.g. a cursor, for a computer display

Also Published As

Publication number Publication date
EP0229986A3 (en) 1989-12-27
DE3689691D1 (de) 1994-04-07
DE3689691T2 (de) 1994-09-15
EP0229986B1 (fr) 1994-03-02

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