EP0195883A2 - Verkleinerung der Energie von Übergangssignalen in einer Kathodenstrahlanzeige mit digitalen Grauwerten - Google Patents

Verkleinerung der Energie von Übergangssignalen in einer Kathodenstrahlanzeige mit digitalen Grauwerten Download PDF

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Publication number
EP0195883A2
EP0195883A2 EP86100110A EP86100110A EP0195883A2 EP 0195883 A2 EP0195883 A2 EP 0195883A2 EP 86100110 A EP86100110 A EP 86100110A EP 86100110 A EP86100110 A EP 86100110A EP 0195883 A2 EP0195883 A2 EP 0195883A2
Authority
EP
European Patent Office
Prior art keywords
crt
display system
glitch
control grid
crt display
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP86100110A
Other languages
English (en)
French (fr)
Other versions
EP0195883A3 (de
Inventor
Trung Le
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of EP0195883A2 publication Critical patent/EP0195883A2/de
Publication of EP0195883A3 publication Critical patent/EP0195883A3/de
Withdrawn legal-status Critical Current

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G1/00—Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data
    • G09G1/002—Intensity circuits

Definitions

  • This invention relates to display circuitry in general and more particularly to a technique for reducing distortion in gray scale cathode ray tube (CRT) display devices during transitions of CRT beam intensities.
  • CRT cathode ray tube
  • FIG. 1 A block diagram of a digitally driven gray scale CRT display system is shown in Fig. 1.
  • a digital representation of sixteen different beam intensity levels can be accomplished by the binary state of the signal levels on lines 2-5 from an array of logic drivers 1 to a digital to an analog (D/A) converter 6.
  • the D/A converter 6 produces one of sixteen different output voltages which is then applied to a video amplifier 8 along line 7.
  • the output of the video amplifier 7 is applied to the cathode of a CRT 9 to control the beam intensity thereof, as is well known to those of skill in the art.
  • the problem would be similar when using other configurations involving greater or lesser resolution; that is, the beam intensity would momentarily be about twice the intended intensity when transitioning from a binary value in which the highest order bit is zero and all lower order bits are one to a value in which the highest order bit is one and all lower order bits are zero. Additionally, it will be understood that the problem also occurs when the intensity is being lowered one step from (in the example of a system with sixteen level resolution) an intensity level corresponding to the binary value of eight to an intensity level corresponding to the binary value of seven.
  • a circuit comprising a high pass filter and DC restoration network is driven by the video amplifier output signal and applied to the control grid of the CRT.
  • No signal conditioning is employed prior to the output of the video amplifier circuit. That is, the higher order bits of the binary value corresponding to the desired intensity level are not delayed and no sample and hold circuitry is employed between the D/A converter and the video amplifier.
  • the fast changing glitch energy at the output of the video amplifier passes through the high pass filter and, when coupled to the control grid of the CRT through the DC bias restoration network, provides a circuit configuration in which the cathode and control grid of the CRT are employed as a difference amplifier.
  • the CRT beam intensity is a function of the difference between the control grid and cathode voltages.
  • logic drivers 1 apply a parallel, multiple bit digital signal along lines 2-5 to the D/A converter 6.
  • This multiple bit digital signal is converted to an analog voltage level by the D/A converter 6, as is well-known in the art, which is applied to the video amplifier 8 along line 7.
  • No conditioning or compensation to reduce glitch energy is employed up to this point. That is, the highest order bits of the binary signal are not delayed with respect to the lower order bits, nor is any sample and hold circuitry employed between the output of the D/A converter 6 and the input of the video amplifier 8.
  • a high pass filter is employed to derive only the fast changing glitch portion of the video amplifier output waveform for this control grid modulation, without passing the lower frequency portion of the video amplifier output waveform which is all that is present during smooth beam intensity transitions which do not include glitches.
  • Fig. 2a the cause of beam intensity glitches in such CRT display systems is graphically illustrated.
  • waveform 15, representative of the highest order, or most significant bit of the signal from the logic drivers 1 applied to the D/A converter 6, is at a valid, high level at time to. This is significantly earlier in time than t,, at which latter time the least significant bits represented by waveforms 16 and 17 fall to valid, low levels.
  • t1 the waveform has responded to the earlier transition of only waveform 15 (Fig. 2a).
  • t2 the waveform has video amplifier has responded to the analog value associated with the digital value reached by t1 in Fig 2a.
  • D/A converters of the current switching type are commercially available for use as the D/A converter 6.
  • a typical configuration of such a D/A converter is shown in Fig. 3.
  • the current switch portion of the D/A converter comprises current switching elements 20a-20n and current sources 21 a-21 connected to lines driven by the least significant bit to the most significant bit, respectively, of the binary value applied from the logic drivers to the D/A converter.
  • the current sources 21 a.21 are connected in series between a summing network 22 and the switching elements 20a-20n.
  • the output of the D/A converter is taken from the summing network 22 for application to the input of a video amplifier.
  • a typical configuration of a video amplifier is shown for a high resolution, high pel density display with fast transition characteristics.
  • the amplifier in Fig. 4 is of a cascode configuration wherein the base of transistor 33 is driven by the output of a D/A converter through an impedance matching and speed-up circuit which comprises resistors 30 and 31 and capacitor 32. Base drive of transistor 33 causes current to flow through resistor 34 proportional to the voltage at the base of transistor 33. With appropriate base bias to the cascode transistor 35, current flow through transistor 33 and resistor 34 also flows through the collector and emitter of transistor 35, the shunt peaking inductor 36 and the load resistor 37. The output of the differential amplifier is taken at the collector terminal of the cascode transistor 35.
  • the cascode transistor 35 is utilized to minimize the Miller effect associated with increased effective input capacitance due to high voltage gain. (Even though the overall amplifier voltage gain is high, that of the first stage -realized by transistor 33, emitter resistor 34 and the equivalent impedance of the collector 33 -is very low. The lower effective input capacitance allows for faster transitions.)
  • Resistor 34 and capacitor 38 form a zero to cancel out a pole at the output formed by resistor 37 and the combination of the output capacitance of transistor 35, the cathode capacitance of the CRT, as well as circuit board stray capacitance at the collector of transistor 35.
  • the high pass filter and DC restoration network of this invention is shown in Fig. 5.
  • the output of the video amplifier 8, connected to the cathode of the CRT 9 is coupled through the high pass filter capacitor 41 to the control grid of the CRT 9.
  • Potentiometer 42 controls the DC bias voltage (V red of the control grid. This bias voltage is filtered by capacitor 43.
  • capacitor 41 couples the glitch energy from the video amplifier 8 to the control grid of the CRT 9.
  • Diode 44 allows the control grid to follow the glitch waveform downward but resets on the upswing of this waveform. This arrangement prevents the DC level of the control grid from shifting depending on the number of glitches encountered by the system.
  • Diode 44 and resistor 45 form the DC restoration network.
  • Resistor 45 provides a discharge path for capacitor 41 when diode 44 is turned off.
  • the waveform in Fig. 6a is the uncorrected waveform presented by the video amplifier to the cathode of the CRT 9 by the circuit configuration shown in Fig. 1.
  • the waveform in Fig. 6b is the signal applied to the control grid of the CRT 9 which is derived from the high pass filter and DC restoration circuit shown in detail in Fig. 5.
  • the waveform in Fig. 6c is the resulting difference in the waveforms of Figs. 6a and 6b. It is, therefore, clear in Fig. 6c that the glitch shown in the uncorrected waveform of Fig. 6a is substantially reduced in the resulting, perceived waveform represented by Fig. 6c.
  • Fig. 7 shows the effect of the addition of the high pass filter and DC restoration network circuitry of Fig. 5 on waveforms having no glitch energy.
  • the waveform shown by the dashed line in Fig. 7 is the video amplifier output while the waveform shown by the solid line in Fig. 7 represents the net beam intensity change as a result of coupling the video amplifier output waveform to the control grid through the high pass filter and DC restoration circuit.
  • a high pass filter and DC restoration circuit couples the control grid of the CRT to the video amplifier such that the cathode and control grid substantially track each other during a glitch. This results in no substantial change in beam intensity as would otherwise be perceived during a glitch. This is accomplished without signal conditioning prior to the output of the video amplifier circuit by means of either delaying the higher order bits of the binary value corresponding to the desired intensity level or sampling and holding the analog output of the D/A converter prior to application of that signal to the video amplifier.

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  • Engineering & Computer Science (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Remote Sensing (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Picture Signal Circuits (AREA)
  • Transforming Electric Information Into Light Information (AREA)
  • Processing Of Color Television Signals (AREA)
  • Spectrometry And Color Measurement (AREA)
  • Testing, Inspecting, Measuring Of Stereoscopic Televisions And Televisions (AREA)
EP86100110A 1985-02-28 1986-01-07 Verkleinerung der Energie von Übergangssignalen in einer Kathodenstrahlanzeige mit digitalen Grauwerten Withdrawn EP0195883A3 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US70680185A 1985-02-28 1985-02-28
US706801 1985-02-28

Publications (2)

Publication Number Publication Date
EP0195883A2 true EP0195883A2 (de) 1986-10-01
EP0195883A3 EP0195883A3 (de) 1990-07-11

Family

ID=24839095

Family Applications (1)

Application Number Title Priority Date Filing Date
EP86100110A Withdrawn EP0195883A3 (de) 1985-02-28 1986-01-07 Verkleinerung der Energie von Übergangssignalen in einer Kathodenstrahlanzeige mit digitalen Grauwerten

Country Status (2)

Country Link
EP (1) EP0195883A3 (de)
JP (1) JPS61201573A (de)

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5126834B1 (de) * 1970-04-01 1976-08-09
US3965389A (en) * 1970-05-09 1976-06-22 Ferranti, Limited Beamed-intensity control systems for cathode-ray tubes
NL179329C (nl) * 1974-09-09 1986-08-18 Philips Nv Televisieontvanger met een bundelstroombegrenzingsschakeling.
JPS58205905A (ja) * 1982-05-24 1983-12-01 Sony Corp ノイズ除去回路
CH662222A5 (de) * 1983-08-18 1987-09-15 Bbc Brown Boveri & Cie Verstaerkerschaltung.

Also Published As

Publication number Publication date
JPS61201573A (ja) 1986-09-06
EP0195883A3 (de) 1990-07-11

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