EP0122432B1 - Photoelectric smoke detector equipped with smoke detecting function test means - Google Patents

Photoelectric smoke detector equipped with smoke detecting function test means Download PDF

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Publication number
EP0122432B1
EP0122432B1 EP19840102465 EP84102465A EP0122432B1 EP 0122432 B1 EP0122432 B1 EP 0122432B1 EP 19840102465 EP19840102465 EP 19840102465 EP 84102465 A EP84102465 A EP 84102465A EP 0122432 B1 EP0122432 B1 EP 0122432B1
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EP
European Patent Office
Prior art keywords
level
output
signal
gate
circuit
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EP19840102465
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German (de)
English (en)
French (fr)
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EP0122432A1 (en
Inventor
Toshikazu C/O Nohmi Bosai Kogyo Co. Ltd. Morita
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Nohmi Bosai Ltd
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Nohmi Bosai Kogyo Co Ltd
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    • G—PHYSICS
    • G08—SIGNALLING
    • G08B—SIGNALLING OR CALLING SYSTEMS; ORDER TELEGRAPHS; ALARM SYSTEMS
    • G08B29/00—Checking or monitoring of signalling or alarm systems; Prevention or correction of operating errors, e.g. preventing unauthorised operation
    • G08B29/12—Checking intermittently signalling or alarm systems
    • G08B29/14—Checking intermittently signalling or alarm systems checking the detection circuits
    • G08B29/145—Checking intermittently signalling or alarm systems checking the detection circuits of fire detection circuits
    • G—PHYSICS
    • G08—SIGNALLING
    • G08B—SIGNALLING OR CALLING SYSTEMS; ORDER TELEGRAPHS; ALARM SYSTEMS
    • G08B17/00—Fire alarms; Alarms responsive to explosion
    • G08B17/10—Actuation by presence of smoke or gases, e.g. automatic alarm devices for analysing flowing fluid materials by the use of optical means
    • G08B17/103—Actuation by presence of smoke or gases, e.g. automatic alarm devices for analysing flowing fluid materials by the use of optical means using a light emitting and receiving device
    • G08B17/107—Actuation by presence of smoke or gases, e.g. automatic alarm devices for analysing flowing fluid materials by the use of optical means using a light emitting and receiving device for detecting light-scattering due to smoke

Definitions

  • the invention relates to a photoelectric smoke detector as defined in the preamble of claim 1.
  • the document EP-A-0 067 339 describes a fire detector and a central including testing means for testing fire detectors in their state of rest to find out such fire detectors which have no response to the surroundings.
  • the output signal of the detector is supervised by measuring and comparing it with predetermined level limits as long as there is no actual alarm signal.
  • the purpose of this invention is to obtain a photoelectric smoke detector equipped with a smoke detecting function test means which, upon receipt of a signal sent from a control panel through lines connecting the smoke detector with the control panel, is capable of automatically, readily and precisely checking whether the output of the light receiving element in the smoke detector is within the normal level range, and of reporting to the control panel the result of the check through the same lines.
  • the invention is defined in claim 1.
  • FIG. 1 Shown in Figure 1 are as follows: Two lines 1 1 , 1 2 which connect the light scattering type smoke detector shown in the Figure with the control panel shown in Figure 2. Conductors a, b connected with the lines 1 1 , 1 2 through a voltage stabilizing circuit CV. A pulse oscillator PO 1 , for a synchronized signal connected between the conductors a, b. A light emitting part 1 which comprises a light emitting element LE such as light emitting diode, and a drive circuit PD connected between the conductors a, b. A light receiving part 2 comprising a light receiving element SB such as solar cell which receives light emitted by the light emitting element LE and scattered by smoke, and an amplifier AM to amplify the output of the light receiving element SB.
  • a light emitting element LE such as light emitting diode
  • a light receiving part 2 comprising a light receiving element SB such as solar cell which receives light emitted by the light emitting element LE and scattered by smoke, and an amplifier AM to
  • a comparison part 3 which comprises a comparator CM with its -terminal on the input side connected with the voltage as operating level at the junction of resistors r 1 , r 2 of those resistors r 1' r 2 , r 3 , r 4 connected in series between the conductors a, b, and its+. terminal on the input side connected with the output of the amplifier AM of the light emitting part 2.
  • the resistors r 1 , r 2 , r 3 , r 4 are provided to determine a fire level, an upper level of the normal level range as a threshold level at which a false alarm is likely to be produced, and a lower level of the normal level range as a threshold level at which alarm failure or delayed alarm is likely to occur.
  • a fire discriminating part4 which comprises an AND gate A 1 and a latch Lt 1 formed by NOR gates NR 1 , NR 2 .
  • the AND gate A 1 receives outputs of the pulse oscillator PO 1 for synchronized signal, the comparator CM in the comparison part 3 and a NOT gate N 3 to the input terminal of which Q output of a monostable multivibrator MM 2 in a timer circuit 9 described hereafter is applied.
  • the latch Lt is set by output of the AND gate A 1 and cleared by output of the NOT gate N 2 in a reset signal generating circuit 8 which is described hereafter.
  • a signal generating circuit 5 which comprises a pulse oscillator PO 2 and NAND gates NA 1 , NA 2 .
  • the pulse oscillator P0 2 is connected between the conductors a, b and generates pulse outputs with low frequency f 1 and high frequency f 2 .
  • the NAND gate NA 1 receives the pulse output with frequency f 1 and the output of the flip-flop circuit FF 2 in a smoke detecting function discriminating circuit 11 described hereafter.
  • the NAND gate NA 2 receives the pulse output with frequency f 2 and the output of the gate NA 1 ,
  • a signal transmission circuit 6 which comprises NOR gates NR 8 , NR 9 and a series circuit connected between the lines 1 1 , I 2 , and sends out the pulse signal with frequency f 1 , or f 2 to the lines 1 1 , 1 2 by controlling the conduction of a transistor T 3 with output of the gate NRg.
  • the NOR gate NR 8 receives outputs developed when the fire discriminating part 4 has detected a fire and of a latch Lt 3 formed by NOR gates NR 6 , NR 7 in the smoke detecting function discriminating circuit 11.
  • the NOR gate NR 9 receives outputs of the NOR gate NR 8 and the NAND gate NA 2 in the signal generating circuit 5.
  • the series circuit is formed by a diode D 1 , resistor r 5 and a transistor T 3 with a resistor r 6 connected between the base and emitter.
  • An additional circuit shown with dotted lines in the signal generating circuit 6 is provided for identifying an alarming detector at the control panel in case plural detectors are connected in parallel between the same lines 1 1 , 1 2 .
  • An oscillator P0 3 generating pulses which vary with each detector and have far higher frequencies than f 1 , f 2 is connected between the conductors a, b.
  • a transistor T 5 is connected between the diode D 1 and the resistor r 5 .
  • Resistors r 18 and r 19 are connected between the conductor a and the base of the transistor T 5 , and between the base of the transistor T 5 and the collector of the transistor T 3 respectively.
  • a capacitor C 6 is connected between the oscillator P0 3 and the base of the transistor T 5 .
  • a signal receiving circuit 7 which receives a single pulse signal with narrow width for test start and a single pulse signal with wide width for resetting which are sent out from the control panel shown in Figure 2.
  • the signal receiving circuit 7 is formed by resistors r 7 , r 8 and a capacitor C 2 which are connected in series between the conductors a, b; an output line d which is led from the junction between the resistor r 8 and the capacitor C 2 to a reset signal generating circuit 8 and a timer circuit9 described hereafter; and a transistor T 4 , conduction of which is controlled by voltage at the junction of the resistors rg, r 10 connected in series between the lines I 1 ,I 2 and which shorts the series circuit of the resistor r a and the capacitor C 2 when became conductive.
  • the reset signal generating circuit 8 confirms receipt of the reset signal from the control panel and transmits the reset signal to the detector.
  • the reset signal generating circuit 8 is equipped with a capacitor C 3 which is charged with output of the signal receiving circuit 7 through a NOT gate N 1 and a resistor r 11 , and produces the reset signal with the voltage of the capacitor C 3 through the resistor r 12 and NOT gate N 2 .
  • the timer circuit 9 operates when the signal receiving circuit 7 has received the test start signal from the control panel, and comprises a latch Lt 2 , resistors r 13 , r 14 , a capacitor C 4 monostable multivibrators MM 1 , MM 2 and AND gates A 2 , A3.
  • the latch Lt 2 is formed by NOR gates NR 3 , NR 4 which are set by output of the signal receiving circuit 7.
  • the output of the latch Lt 2 is sent to the monostable multivibrators MM 1 , MM 2 having a short and long operating time respectively through the delay circuit formed by the resistor r 13 , capacitor C 4 and resistor r 14 to prevent the timer circuit 9 from operating with the output of the latch Lt 2 when the signal receiving circuit 7 has received the reset signal from the control panel.
  • the output of the monostable multivibrators MM 1 , MM 2 are applied to the input terminals of the AND gates A 2 , A3.
  • An operating level changeover circuit 10 which changes over the operating level of the comparator CM in the comparison part 3, and operates as follows.
  • the transistor T 1 With the output of the AND gate A 2 in the timer circuit 9 transmitted through a diode D 2 and a resistor r 15 , the transistor T 1 becomes conductive and shorts the series circuit formed by resistors r 3 , r 4 . With the output of the AND gate A3 transmitted through a diode D 3 and a resistor r 16 , the transistor T 2 becomes conductive and shorts the resistor r 4 alone. Thus, the voltage applied as operating level to the -terminal on the input of the comparator CM in the comparison part 3 becomes the fire level of the light scattering type smoke detector while the both transistors T 1 , T 2 are not conducting.
  • a smoke detecting function discriminating circuit 11 which comprises AND gates A4, As, OR gate R 1 , R-S flip-flop circuit FF 1 , D-type (delayed) flip-flop circuit FF 2 , resistors r 17 , r 18 , capacitor C 5 , NOT gate N 4 , NOR gate NR S and latch Lt 3 formed by NOR gates NR 6 , NR 7 .
  • the R-S flip-flop circuit FF 1 receives the output of the AND gate A4 as set input and the output of the OR gate R 1 as reset input which is connected with the outputs of the AND gate As and the reset signal generating circuit 8.
  • the D type flip-flop circuit FF2 receives Q output of the flip-flop circuit FF 1 as D input, the clock signal as CP input generated by the NOR gate NR S and the output of the circuit 8 as reset input.
  • the NOR gate NR 5 serving as clock signal generator is connected with the Q output of the monostable multivibrator MM 2 in the timer circuit 9 and the output of the NOT gate N 4 to which the voltage of the capacitor C s charged with the Q output through the resistor r 17 is applied through the resistor r 18 .
  • the latch LT 3 is formed by the NOR gates NR 6 , NR 7 receives the output of the NOR gate NR S as set input and is cleared by output of the reset signal generating circuit 8.
  • a d.c. power supply E a detecting circuit M for abnormal signal with frequency f 2 including a fire signal
  • a detecting circuit N for normal signal with frequency f 1
  • a relay X which operates when a test start switch SW 1 has closed
  • a relay Y which operates when a reset switch SW 2 has closed
  • a test start signal generator TS which operates when the contact x 1 of the relay X has closed
  • a reset signal generator RS which operates when the contact y 1 of the relay Y has closed
  • a fire indicator lamp La 1 which is lit through the break contact x 4 of the relay X and the make contact m 1 of the relay M
  • an abnormal indicator lamp La 2 which is lit through the make contact x 3 of the relay X and the make contact m 2 of the relay M
  • a normal indicator lamp La 3 which is lit through the make contact x 3 of the relay X and the make contact n 1 of the relay N
  • a timer T which starts operating when the contact x 5 of the relay
  • the latch Lt 2 formed by the NOR gates NR 3 , NR 4 has the input of L level, and accordingly its output, too, is at L level as shown in the left part of Figure (5), thus no clock signal is generated.
  • the Q outputs of the monostable multivibrators MM 1 , MM 2 are at L level
  • the Q output of the former MM 1 is at H level
  • the outputs of the AND gates A 2 , A3 are at L level.
  • the transistors T 1 , T 2 in the operating level changeover circuit 10 do not switch on, and as shown with the dotted line in Figure (11) the operating level of the comparator CM in the comparison part 3 is at fire level L 3 which is determined by dividing ratio of the resistance values of the resistors r 1 are r 2 +r 3 +r 4 .
  • the light emitting elements LE emits light through the driving circuit PD in the light emitting part 1 each time the pulse oscillator PO 1 generates the synchronizing signal as shown in Figure (10). With the scattered light from the inner wall of the labyrinth the output amplifier AM of the light receiving element SB in the light receiving part 2 gives off an output as shown in Figure (11).
  • the comparator CM in the comparison part 3 has no output as shown in the left part of Figure (12).
  • the output of the NOT gate N 3 is at H level because the Q output of the monostable multivibrator MM 2 in the timer circuit 9 is at L level.
  • the output of the comparator CM is at L level, the output of the AND gate A 1 becomes L level, and accordingly the input of the latch Lt 1 formed by NOR gates NR 1 , NR 2 and the output of the NOR gates NR 2 are at L level as shown in the left part of Figure (13).
  • the output of the comparator CM in the comparison part 3 being at L level
  • the outputs of the AND gates A4, A 5 are at L level.
  • the output of the OR gate R 1 is at L level
  • the Q output of the R-S flip-flop circuit FF 1 is at L level as shown in Figure (14).
  • the Q output of the monostable multivibrator MM 2 in the time circuit 9 is at L level while the output of the NOT gate N 4 is at H level.
  • the outputs of the NOR gate NR S serving as clock signal generator, the Q output of the D-type flip-flop circuit FF2 and the output of the latch Lt 3 formed by NOR gate NR 6 , NR 7 are at L level as shown in Figure (16), (15) and (17) respectively. Therefore, in the signal generating circuit 5 the pulse oscillator PO 2 produces pulses with frequencies f 1 and f 2 shown in Figure (18) and (19) respectively. With the pulse having frequency f 1 and Q output of the circuit FF 2 being at L level, the output of the NAND gate NA 1 becomes continuous H level.
  • the NAND gate NA 2 With the pulse signal having frequency f 2 and the continued H level output of the NAND gate NA 1 , the NAND gate NA 2 generates a pulse signal with a phase opposite to that of the pulse signal having frequency f 2 from the pulse oscillator P0 2 as shown in Figure (20). Since the output of the NOR gate NR 8 in the signal transmission circuit 6 is at H level, the output of the NOR gate NR 9 is at L level as shown in the left part of Figure (21), consequently the transistor T 3 does not become conductive, and no output appears on the lines 1 1 , 1 2 as shown in the left part of Figure (2).
  • the amplifier AM for the light receiving element SB When smoke generated by fire enters the labyrinth and its density exceeds the fire level L 3 as shown in the middle part of Figure (1), the amplifier AM for the light receiving element SB generates a pulse signal exceeding the fire level L 3 as shown in Figure (11), and the comparator CM generates a corresponding pulse signal as shown in Figure (12) at the time of light emission from the light emitting element LE.
  • the synchronizing signal generated by oscillator PO 1 as shown in Figure (10) and the H level output of the NOT gate N 3 the AND gate A 1 generates a pulse signal corresponding to the output of the comparator CM.
  • This pulse signal sets the output of the latch Lt 1 formed by NOR gates NR 1 , NR 2 as shown in Figure (13), and the NOR gate NR 2 generates a fire detecting output.
  • the output of the NOR gate NR 8 in the signal transmission circuit 6 becomes L level.
  • the NOR gate NR 9 With this L level output and the pulse signal of frequency f2 from the NAND gate N 2 in the signal generating circuit 5 as shown in Figure (20), the NOR gate NR 9 generates a pulse signal with frequency f 2 as shown in Figure (21) and sends an abnormal signal with frequency f 2 as fire signal as shown in Figure (2) to the lines I 1 , I 2 through the transistor T 3 .
  • the contact m 1 closes and the fire indicator lamp La 1 lights.
  • the reset switch SW 2 on the control panel is closed to operate the relay Y.
  • the contact y 1 closes to operate the reset signal generator RS, which sends out the reset signal as shown with the symbol P 2 in Figure (2) to the lines 1 1 , I 2 .
  • the transistor T 4 in the signal receiving circuit 7 in the detector stops conducting, and the signal P 2 as shown in Figure 3 (3) is generated in the output line d in the circuit 7.
  • the output of the NOT gate N 1 in the reset signal generating circuit 8 becomes L level, and the charge on the capacitor C 3 is released through the NOT gate N 1 .
  • the NOT gate N2 becomes L level
  • the NOT gate N 2 generates the clear signal c as shown in Figure (4).
  • the latch Lt 2 is set and the NOR gate NR 4 gives an output at H level as shown in Figure (5).
  • test start signal generator TS sends the test start signal shown with a symbol P 1 in Figure 4A (2) to the lines I 1 , I 2 to interrupt, for a short time, conduction of the transistor T 4 in the signal receiving circuit 7 of the detector shown in Figure 1.
  • the circuit 7 generates the pulse signal P 1 ' in the output line d as shown in Figure (3). With the signal P 1 ', the output of the NOT gate N 1 in the reset signal generating circuit 8 becomes L level, and the charge on the capacitor C 3 is released through the NOT gate N 1 .
  • the capacitor C 3 raises the output of the NOT gate N 2 to H level, the output P 1 ' disappears and the output of the NOT gate N 1 again becomes H level. Therefore, the capacitor C 3 is recharged, thus the NOT gate N 2 maintains the L level output as shown in Figure (4).
  • the output P 1 ' of the circuit 7 also sets the latch Lt 2 formed by NOR gates NR 3 , NR 4 in the timer circuit 9. As the capacitor C 4 is charged with the H level output of the NOR gate NR 4 through the resistor r, 3 as shown with the dotted line in Figure (5) and its voltage reaches the H level, the clock signal is sent to the CP terminals of the monostable multivibrators MM 1 , MM 2 with this voltage.
  • H level outputs develop as shown in Figures (6), (7), and a L level output develops on the Q terminal of the monostable multivibrator MM 1 , then the output of the AND gate A 2 becomes H level as shown in Figure (8).
  • the transistor T 1 in the operating level changeover circuit 10 too is conducting while the output of the AND gate A 2 is at H level.
  • the operating level of the comparator CM in the comparison part 3 becomes the lower level L 1 of the normal level range which is determined by resistance dividing ratio of the resistor r 1 , r 2 , as shown with the dotted line in Figure (11).
  • the output of the NOT gate N 3 becomes L level and inhibits operation of the AND gate A 1 .
  • the capacitor C 5 in the function discriminating circuit 11 is charged.
  • the output of the NOT gate N 4 becomes L level, but the other input of the NOR gate NR S is at H level. Therefore, the NOR gate NR 5 does not produce the clock signal.
  • the comparator CM Under this condition, if the pulse output of the amplifier AM in the signal receiving part 2 lies between the lower level L 1 and the upper level L 2 of the normal level range as shown in Figure (11), the comparator CM generates detecting pulse signal as shown in Figure (12) because the pulse output of the amplifier AM is above the operating level of the comparator CM. With this pulse output of the comparator CM, synchronized signal generated by the pulse oscillator PO 1 and H level output of the AND gate A 2 , the AND gate A4 generates the pulse output similar to that of the comparator CM as shown in Figure (12). This output of the AND gate A4 sets the Q output of the circuit FF 1 in the function discriminating circuit 11 at H level as shown in Figure (14). On the other hand the Q output of the circuit FF 2 remains at L level as shown in Figure (15) because the CP terminal receives no clock signal from the NOR gate NR 5 .
  • the Q output and Q of the monostable multivibrator MM 1 in the timer circuit 9 become L level and H level respectively as shown in Figure (6). Consequently, the output of the AND gate A 2 becomes L level as shown in Figure (8), inhibiting operation of the AND gate A4 in the circuit 11, and rendering the transistor T 1 in the circuit 10 non conductive.
  • the output of the AND gate A3 becomes H level as shown in Figure (9)
  • the transistor T 2 becomes conductive
  • the operating level of the comparator CM in the comparison part 3 reaches the upper level of the normal level range as shown with the symbol L 2 in Figure (11) which is determined by dividing ratio of the resistors r 1 and r 2 +r 3 .
  • the amplifier AM in the light receiving part 2 has the normal output as shown in Figure (11)
  • the output of the comparator CM is at L level as shown in Figure (12) because the output of the amplifier AM is below the level L 2 .
  • the NAND gate NA 1 in the signal generating circuit 5 With the H level output of the flip-flop circuit FF 2 , the NAND gate NA 1 in the signal generating circuit 5 generates a pulse signal having the phase opposite to that of the pulse signal with frequency f 1 generated by the oscillator P0 2 , and the NAND gate NA 2 generates a pulse signal with frequency f 1 as shown in Figure (20).
  • the clock signal from the NOR gate NR S sets the latch Lt 3 formed by NOR gate NR 6 , NR 7 , and the output of the NOR gate NR 7 becomes H level.
  • the output of the NOR gate NR 8 in the signal transmission circuit 6 becomes L level, and the NOR gate NR 9 generates a pulse signal with frequencyf, as shown in Figure (21), by which conduction of the transistor T 3 is controlled and the normal signal shown in Figure (2) is sentto the lines 1 1 , I 2 .
  • the NOT gate N 2 in the reset signal generating circuit 8 generates a clear signal c shown in Figure (4), which resets the latches Lt 2 , Lt 3 formed by NOR gates NR 3 , NR 4 and NR 6 , NR 7 respectively in the same manner as resetting in case of fire. Then, the outputs of the NOR gates NR 4 , NR 7 become L level as shown in Figure (5) and (17) respectively.
  • the signal receiving circuit 7 in Figure 1 generates a pulse signal P 1 ' in the output line d with the test start signal P 1 from the control panel shown in Figure 5 (A) (2).
  • the NOT gate N 2 in the reset signal generating circuit 8 generates no clear signal.
  • the latch Lt 2 formed by NOR gates NR 3 , NR 4 in the timer circuit 9 is set as shown in Figure (5) with the pulse signal P 1 '.
  • the Q output of the monostable multivibrator MM 1 in the timer circuit 9 becomes L level as shown in Figure 6, and the Q output becomes H level.
  • the outputs of the AND gates A 2 , A3 become L and H levels respectively as shown in Figures (8), (9), thus rendering the transistor T 1 non-conductive and the transistor T 2 conductive. Consequently the operating level of the comparator CM becomes the level L 2 as shown in Figure (11). Even at this level L 2 , the comparator CM has no output as shown in Figure (12), and the AND gate A 5 , too, has no output.
  • the Q output of the monostable multivibrator MM 2 becomes L level as shown in Figure (7), and the NOR gate NR 5 generates the clock signal c shown in Figure (16), which sets the latch Lt 3 .
  • the NOR gate NR 9 As the output of the NOR gate NR 8 in the signal transmission circuit 6 becomes L level with the H level output of the NOR gate NR 7 shown in Figure (17), the NOR gate NR 9 generates a pulse signal with frequency f 2 as shown in Figure (21) because the NAND gate NA 2 in the signal generating circuit 5 is generating a pulse signal with frequency f 2 as shown in Figure (20).
  • the pulse signal from the NOR gate NR 9 conduction of the transistor T 3 is controlled, and the abnormal signal is sent to the control panel through the lines 1 1 , I 2 as shown in Figure (2).
  • the signal receiving circuit 7 in Figure 1 generates the pulse signal P 1 ' in the output line d shown in Figure (3) with the test start signal P 1 from the control panel shown in Figure 6(A) (2).
  • the NOT gate N 2 in the reset signal generating circuit 8 does not generate the clear signal
  • the latch LT 2 in the timer circuit 9 is set.
  • the capacitor C 4 is charged with the H level output of the NOT gate NR 4 as shown with the dotted line in Figure (5).
  • outputs of H level develop at the Q terminals of the monostable multivibrators MM 1 , MM 2 as shown in Figure (6), (7) and the output of the AND gate A 2 becomes H level.
  • the transistor T 1 in the operating level changeover circuit 10 becomes conductive as shown in Figure 6 (8), and the operating level of the comparator CM in the comparison part 3 becomes the lower level L 1 of the normal level range as shown with the dotted line in Figure (11).
  • the output of the NOT gate N 3 in the fire discriminating circuit 4 becomes L level and inhibits operation of the AND gate A 1 , while on the other hand the NOR gate NR 5 in the function discriminating circuit 11 generates no clock signal.
  • the Q output of the flip-flop circuit remains at L level.
  • the Q output of the monostable multivibrator MM 1 in the timer circuit 9 becomes L level as shown in Figure (6) and Q output becomes H level.
  • the outputs of the AND gates A 2 , A3 become Land H levels respectively as shown in Figure (8), (9).
  • the transistor T 1 becomes non-conductive and the transistor T 2 conductive.
  • the operating level of the comparator CM changes to level L 2 as shown in Figure (11), the output of the comparator CM remains at H level.
  • the NOR gate NR 7 has H level output shown in Figure (17), and the output of the NOR gate NR 8 in the signal transmission circuit 6 becomes the L level, the NAND gate NA 2 in the signal generating circuit 5 generates a pulse signal with frequency f 2 as shown in Figure (20), and accordingly the NOR gate NR 9 generates a pulse signal of frequency f 2 as shown in Figure (21) to control conduction of the transistor T 3 and to send an abnormal signal to the control panel through the lines 1 1 , 1 2 as shown in Figure (2).
  • the signal receiving circuit 7 operates with the reset signal P 2 shown in Figure 5(A) and 6(A) (2) and received from the control panel after the test conducted in case that the output of the amplifier AM has fallen below the lower level L 1 and exceeded the upper level L 2 .
  • the signal receiving circuit 7 generates a pulse signal P 2 ' shown in Figure (3) in the output line d.
  • the NOT gate N 2 in the reset signal generating circuit 8 generates the clear signal c shown in Figure 6 (4), with which the latches Lt 2 , Lt 3 formed by NOR gates NR 3 , NR 4 and NR 6 , NR 7 respectively are reset. Then, the outputs of the NOR gates NR 4 , NR 7 become L level as shown in Figures (5) and (17).
  • the relay X operates to close the contacts x 1 ⁇ x 3 and open the contact x 4 . Therefore, on receipt of the normal signal from the detector shown in Figure 1, the relay N operates and close the contact N 1 , and the normal indicator lamp La 3 lights.
  • the relay M operates and closes the contacts m 1 , m 2 to cause the abnormal indicator lamp La 2 to light up indicating that there is abnormality in the smoke detecting function.
  • the relay Y operates and closes the contact y 1 and opens the contact y 2 to actuate the reset signal generator RS which sends the reset signal to the lines I 1 , I 2 .
  • operation of the relay X is stopped and the contacts x 1 , x 2 , x 3 are opened to prevent the test signal generatorTS from operating and to extinguish the normal indicator lamps La 2 , La 3 .
  • the contact x 4 is closed to reset the control panel in the normal supervisory condition.
  • Figure 7 is a circuit diagram of another embodiment according to the present invention relating to a light extinction type smoke detector which detects smoke on light extinction principle.
  • the circuit diagram of the control panel used for this embodiment is the same as Figure 2.
  • the light extinction type smoke detector shown in Figure 7 only differs from Figure 1 in that the resistors r 1 ⁇ r 4 are connected in series across the conductors a, b in opposite order to determine the upper level L 1 of the normal level range as threshold level at which alarm failure or delayed alarm is likely to occur, a lower level L 2 as threshold level at which false alarm is likely to be produced, and the fire level L 3 , and that the voltage of operating level developing at the junction of the resistors r 1 and r 2 is applied to the + terminal of the comparator CM in the comparison part 3 and the output of the amplifier AM in the light receiving part 2 is led to the - terminal so that the comparator CM generates the detecting output when the output of the amplifier AM has fallen below the operating level.
  • the comparator CM has the. L level output shown in Figure (12') and the output of the AND gate A 1 is at the L level when the amplifier AM generates a pulse signal exceeding the level L 3 shown in Figure (11'). Consequently, no signal is sent to the lines 1 1 , I 2 .
  • the comparator CM has the H level output as shown in Figure (12'), with which and the synchronizing signal from the oscillator PO 1 and the H level output of the NOT gate N 3 , the AND gate A1 in the fire detecting part 4 generates a pulse signal corresponding to the output of the comparator CM. Then, the latch Lt 1 formed by the NOR gates NR 1 , NR 2 is set as shown in Figure (13).
  • a fire signal with frequency f 2 shown in Figure (2) is sent to the lines 1 1 , 1 2 through the signal transmission circuit 6. Operation of the control panel after receipt of this fire signal and resetting of the fire detector by reset signal from the control panel are same as in the case of the light scattering type smoke detector.
  • the clock signal is transmitted to the CP terminals of the monostable multivibrators MM 1 , MM 2 .
  • the Q terminals of the monostable multivibrators MM 1 , MM 2 have H level outputs as shown in Figures (6), (7), with which the output of the AND gate A 2 , too, become the H level as shown in Figure (8), and the transistor T 1 in the operating level changeover circuit 10 becomes conductive.
  • the operating level of the comparator CM in the comparison part 3 becomes the upper level L 1 of the normal level range (e.g. 105% light transmittivity) as shown with the dotted line in Figure (11').
  • the pulse output of the amplifier AM in the light receiving part 2 lies between the upper level L 1 and the lower level L 2 of the normal level range as shown in Figure (11')
  • the pulse output is below the operating level of the comparator CM. Therefore, the comparator CM has no L level output, but H level output as shown in Figure (12').
  • the AND gate A4 With this H level output and the synchronizing signal from the oscillator PO 1 and the H level output of the AND gate A 2 , the AND gate A4 generates a pulse output which is similar to that shown in Figure (12).
  • the output of the Q terminal of the flip-flop circuit FF 1 in the function discriminating circuit 11 is set at H level.
  • the H level output of the NOR gate NR 4 shown in Figure (5) With the H level output of the NOR gate NR 4 shown in Figure (5), the H level outputs shown in Figures (6), (7) appear on the Q terminals of the monostable multivibrators MM 1 , MM 2 , and the output of the AND gate A 2 becomes H level, and the transistor T 1 in the operating level change over circuit 10 becomes conductive as shown in Figure (8).
  • the operating level of the comparator CM becomes the upper level L 1 of the normal level range as shown with the dotted line in Figure (11').
  • the NOR gate NR 5 in the smoke detecting function discriminating circuit 11 generates the clock signal c shown in Figure (16), and the NOR gate NR 7 has the H level output as shown in Figure (17).
  • the output of the NOR gate NR 8 in the signal transmission circuit 6 becomes L level.
  • the NOR gate NR 9 generates a pulse output with frequency f 2 as shown in Figure (21) to send the abnormal signal to the lines 1 1 , 1 2 as shown in Figure (2).
  • the H level output of the NOR gate NR 4 shown in Figure (5) With the H level output of the NOR gate NR 4 shown in Figure (5) the H level outputs shown in Figures (6), (7) appear on the Q terminals of the monostable multivibrators MM 1 , MM 2 , and the output of the AND gate A 2 becomes H level, and the transistor T 1 in the operating level changeover circuit 10 becomes conductive as shown in Figure (8).
  • the operating level of the comparator CM becomes the upper level L, of the normal level range as shown with the dotted line in Figure (11'). If the output of the amplifier AM in the light receiving part 2 is below the lower level L 2 of the normal level range at this time, the comparator CM has no L level output but the H level output as shown in Figure (12').
  • the AND gate A4 in the function discriminating circuit 11 With this H level output the AND gate A4 in the function discriminating circuit 11 generates a pulse output similar to that shown in Figure (12).
  • This pulse output sets the output of the Q terminal of the flip-flop circuit at H level as shown in Figure (14), but the output of the terminal of the flip-flop circuit FF 2 remains at L level because no clock signal is transmitted to the CPU terminal of the flip-flop circuit FF2.
  • the transistor T 2 soon becomes conductive in place of the transistor T 1 as shown in Figure (9), and the operating level of the comparator CM changes to the level L 2 as shown in Figure (11').
  • the output of the comparator CM is at H level, with which the AND gate A 5 and OR gate R 1 successively generate H level outputs to the R terminal of the flip-flop circuit FF, the Q output of which becomes the L level as shown in Figure (14).
  • the NOR gate NR S in the function discriminating circuit 11 generates the clock signal c as shown in Figure (16)
  • the latch Lt 3 formed by NOR gates NR s , NR 7 is set.
  • the NOR gate NR 7 has a H level output as shown in Figure (17), and the abnormal signal is transmitted to the control panel through the signal transmission circuit 6 and the lines 1 1 , 1 2 in the same manner as described with regard to Figure 6(A) for the light scattering type smoke detector.
  • the descriptions are made with respect to such cases that the smoke detector and the control panel are connected by two lines which are commonly used as power supply lines and signal lines.
  • the terminal on the right side of the voltage stabilizing circuit CV may be disconnected from the line 1 1 and connected with a third line 1 3 which is exclusively used for power supply so that the power supply lines may be separated from the signal lines to avoid influence of the pulse signal width upon the voltage stabilizing circuit and to get a larger S/N ratio.
  • the photoelectric type smoke detector equipped with smoke detecting function test means has such an advantage that with proper composition it is capable of automatically, readily and precisely checking, on the basis of the signal sent from the control panel through the lines connecting the smoke detector with the control panel, whether the output of the detector is within the normal level range which cause no false alarm, alarm failure nor delayed alarm, i.e. an important function of this type of detector, and of reporting to the control panel on results of the test through the same lines.

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Business, Economics & Management (AREA)
  • Emergency Management (AREA)
  • Fire-Detection Mechanisms (AREA)
  • Investigating Or Analysing Materials By Optical Means (AREA)
  • Fire Alarms (AREA)
EP19840102465 1983-03-21 1984-03-08 Photoelectric smoke detector equipped with smoke detecting function test means Expired EP0122432B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP4668383A JPS59172094A (ja) 1983-03-21 1983-03-21 煙検出機能試験装置を備えた光電式煙感知器
JP46683/83 1983-03-21

Publications (2)

Publication Number Publication Date
EP0122432A1 EP0122432A1 (en) 1984-10-24
EP0122432B1 true EP0122432B1 (en) 1987-12-23

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ID=12754171

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Application Number Title Priority Date Filing Date
EP19840102465 Expired EP0122432B1 (en) 1983-03-21 1984-03-08 Photoelectric smoke detector equipped with smoke detecting function test means

Country Status (3)

Country Link
EP (1) EP0122432B1 (enrdf_load_stackoverflow)
JP (1) JPS59172094A (enrdf_load_stackoverflow)
DE (1) DE3468286D1 (enrdf_load_stackoverflow)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3671120D1 (de) * 1985-07-29 1990-06-13 Siemens Ag Verfahren und vorrichtung zur betriebsmaessigen ueberwachung optischer rauchmelder.
GB2326474A (en) * 1994-09-27 1998-12-23 Hochiki Co Projected beam type smoke detector and receiving unit
US5751216A (en) * 1994-09-27 1998-05-12 Hochiki Kabushiki Kaisha Projected beam-type smoke detector and receiving unit
WO2004034348A1 (fr) * 2002-10-04 2004-04-22 Valery Vasilievich Ovchinnikov Procede de formation et de transmission de signaux

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5612707Y2 (enrdf_load_stackoverflow) * 1972-09-16 1981-03-24
JPS507583A (enrdf_load_stackoverflow) * 1973-05-17 1975-01-25
JPS5377199A (en) * 1976-12-20 1978-07-08 Matsushita Electric Ind Co Ltd Fire detector
US4306230A (en) * 1979-12-10 1981-12-15 Honeywell Inc. Self-checking photoelectric smoke detector
JPS57102873U (enrdf_load_stackoverflow) * 1980-12-15 1982-06-24
JPS57172495A (en) * 1981-04-15 1982-10-23 Nittan Co Ltd Select test circuit for fire sensor, etc.
US4374329A (en) * 1981-04-24 1983-02-15 Pittway Corporation Smoke detector with test apparatus
DE3123451A1 (de) * 1981-06-12 1982-12-30 Siemens AG, 1000 Berlin und 8000 München Verfahren und anordnung zur stoerungserkennung in gefahren-, insbesondere brandmeldeanlagen

Also Published As

Publication number Publication date
EP0122432A1 (en) 1984-10-24
JPH0441396B2 (enrdf_load_stackoverflow) 1992-07-08
JPS59172094A (ja) 1984-09-28
DE3468286D1 (en) 1988-02-04

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