EP0051598A1 - Procede de decollage - Google Patents

Procede de decollage

Info

Publication number
EP0051598A1
EP0051598A1 EP19810900532 EP81900532A EP0051598A1 EP 0051598 A1 EP0051598 A1 EP 0051598A1 EP 19810900532 EP19810900532 EP 19810900532 EP 81900532 A EP81900532 A EP 81900532A EP 0051598 A1 EP0051598 A1 EP 0051598A1
Authority
EP
European Patent Office
Prior art keywords
layer
substrate
depositing
masking
over
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP19810900532
Other languages
German (de)
English (en)
Inventor
Michael R. Splinter
Patrica D. Maddox
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Boeing North American Inc
Original Assignee
Rockwell International Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rockwell International Corp filed Critical Rockwell International Corp
Publication of EP0051598A1 publication Critical patent/EP0051598A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0272—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers for lift-off processes

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Drying Of Semiconductors (AREA)
  • Weting (AREA)

Abstract

Procede de formation d'un modele conducteur sur un substrat semi-conducteur consistant a deposer une premiere couche de materiau ayant un premier taux d'attaque chimique caracteristique sur une couche sous-jacente du substrat, et a appliquer une couche de masque ayant un second taux d'attaque chimique caracteristique different du premier et formant une configuration d'ouvertures sur la premiere couche. Une solution d'attaque chimique est ensuite appliquee sur le corps par dessus la couche de masque de sorte que la premiere couche soit attaquee chimiquement au niveau des ouvertures sur la couche sous-jacente ou substrat, creant ainsi une depouille sous la couche de masque. Une pellicule metallique d'une epaisseur appropriee est deposee sur les couches de maniere a creer un escalier discontinu sur le bord de la couche de masque. Finalement, une solution dissolvante est appliquee pouvant dissoudre la premiere couche pour l'enlever et decoller la couche metallique deposee sur la couche de masque, laissant ainsi une configuration de metal sur le substrat.
EP19810900532 1980-05-08 1980-05-08 Procede de decollage Withdrawn EP0051598A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/US1980/000544 WO1981003240A1 (fr) 1980-05-08 1980-05-08 Procede de decollage

Publications (1)

Publication Number Publication Date
EP0051598A1 true EP0051598A1 (fr) 1982-05-19

Family

ID=22154335

Family Applications (1)

Application Number Title Priority Date Filing Date
EP19810900532 Withdrawn EP0051598A1 (fr) 1980-05-08 1980-05-08 Procede de decollage

Country Status (2)

Country Link
EP (1) EP0051598A1 (fr)
WO (1) WO1981003240A1 (fr)

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL163370C (nl) * 1972-04-28 1980-08-15 Philips Nv Werkwijze voor het vervaardigen van een halfgeleider- inrichting met een geleiderpatroon.
US4218283A (en) * 1974-08-23 1980-08-19 Hitachi, Ltd. Method for fabricating semiconductor device and etchant for polymer resin
FR2285716A1 (fr) * 1974-09-18 1976-04-16 Radiotechnique Compelec Procede pour la fabrication d'un dispositif semi-conducteur comportant une configuration de conducteurs et dispositif fabrique par ce procede
US4004044A (en) * 1975-05-09 1977-01-18 International Business Machines Corporation Method for forming patterned films utilizing a transparent lift-off mask
US4131496A (en) * 1977-12-15 1978-12-26 Rca Corp. Method of making silicon on sapphire field effect transistors with specifically aligned gates
US4228212A (en) * 1979-06-11 1980-10-14 General Electric Company Composite conductive structures in integrated circuits

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO8103240A1 *

Also Published As

Publication number Publication date
WO1981003240A1 (fr) 1981-11-12

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Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

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AK Designated contracting states

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STAA Information on the status of an ep patent application or granted ep patent

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18D Application deemed to be withdrawn

Effective date: 19820712

RIN1 Information on inventor provided before grant (corrected)

Inventor name: SPLINTER, MICHAEL R.

Inventor name: MADDOX, PATRICA D.