EP0023490B1 - Garde-temps,en particulier horloge pilotee a quartz - Google Patents

Garde-temps,en particulier horloge pilotee a quartz Download PDF

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Publication number
EP0023490B1
EP0023490B1 EP79901536A EP79901536A EP0023490B1 EP 0023490 B1 EP0023490 B1 EP 0023490B1 EP 79901536 A EP79901536 A EP 79901536A EP 79901536 A EP79901536 A EP 79901536A EP 0023490 B1 EP0023490 B1 EP 0023490B1
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EP
European Patent Office
Prior art keywords
flip
motor
input
frequency divider
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
EP79901536A
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German (de)
English (en)
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EP0023490A1 (fr
Inventor
Horst SCHÄFER
Peter Busch
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Braun GmbH
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Braun GmbH
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Filing date
Publication date
Priority claimed from DE19782850357 external-priority patent/DE2850357A1/de
Priority claimed from DE19782850295 external-priority patent/DE2850295C3/de
Priority claimed from DE19782850325 external-priority patent/DE2850325C3/de
Application filed by Braun GmbH filed Critical Braun GmbH
Publication of EP0023490A1 publication Critical patent/EP0023490A1/fr
Application granted granted Critical
Publication of EP0023490B1 publication Critical patent/EP0023490B1/fr
Expired legal-status Critical Current

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    • G—PHYSICS
    • G04—HOROLOGY
    • G04C—ELECTROMECHANICAL CLOCKS OR WATCHES
    • G04C3/00—Electromechanical clocks or watches independent of other time-pieces and in which the movement is maintained by electric means
    • G04C3/14—Electromechanical clocks or watches independent of other time-pieces and in which the movement is maintained by electric means incorporating a stepping motor

Definitions

  • the invention relates to a time-keeping device, in particular a quartz-controlled clock, with an electronically controlled motor with a working winding for driving a display system and a control winding which emits pulses proportional to the motor speed to the setting input of a bistable multivibrator, at the reset input of which a first frequency divider and the frequency of the motor pulses corresponding pulses of the oscillator are placed, only one speed of the electronically controlled motor above the nominal speed is controllable and the bistable multivibrator is connected on the output side to an input of a gate, the other input of which is connected to the output of a the first frequency divider is connected downstream of the second frequency divider and the output thereof controls the working winding of the motor via an output amplifier.
  • time display elements of a watch with an analog time display are controlled directly with the impulses of a frequency divider that divides the frequency of the quartz oscillator, a relatively high power consumption is usually required to ensure continued reliability, which can only be reduced if greater sensitivity to interference is permitted becomes.
  • both the pulses emitted by the reference quartz oscillator and the pulses proportional to the motor frequency are divided down via frequency divider chains.
  • the divider chain connected downstream of the reference quartz oscillator and thus the setpoint frequency pulses are the same and in phase with the frequency divider chain connected downstream of the motor circuit and are therefore proportional to the motor frequency.
  • the drive pulses delivered to the motor generally have steep switch-on and switch-off edges, consequently steep needle pulses are also given to the motor circuit, which are undesirable at the control input of the control and regulating arrangement or which can disrupt the logic of an integrated circuit. Since the control input for the control and regulating arrangement is generally provided with a trigger level which is below the level of the interference pulses, the downstream logic counts more pulses than are actually applied to the motor circuit in accordance with the motor speed.
  • the object of the present invention is to keep away from the input of a logic circuit serving to control an electronically controlled motor of the type mentioned at the outset, which leads to faulty control, with little effort without reducing the input voltage of the logic circuit and without changing the control winding.
  • a first inverter serving as an input threshold value switch is connected to the control winding of the electronically controlled motor, which generates a square-wave signal from the AC voltage signal emitted by the control winding of the electronically controlled motor, and in that the first inverter has a digital filter with a subsequent pulse shaper to generate a Narrow pulse from the falling edge of the square-wave signal is provided, the interference pulse adjustable pulse width does not advance and its trigger frequency is tapped by the first frequency divider connected downstream of the oscillator.
  • interference pulses which can lead to faulty control, can be kept out with little effort and without reducing the input voltage of the logic circuit and without changing the control winding. Interference pulses at the input of the control circuit, which fall below a certain adjustable pulse width, are therefore not switched on and therefore cannot further disturb the logic of the integrated control circuit.
  • the block diagram of the drive of an analog quartz clock shown in FIG. 1 shows an oscillator 1 generating the frequency of, for example, 4, 19 MHz, which is followed by a first electronic frequency divider 6. the output of the first frequency divider 6 leads via a second frequency divider 7 and a pulse shaper 49 as the target frequency to the input of a bistable multivibrator 50.
  • the actual frequency is generated by the control winding of the synchronous motor SM, which rotates, for example, at eight revolutions per minute and drives a pointer gear and leads via a motor pulse divider 91 to a second input of the bistable flip-flop 50, the motor pulse divider 91 being further pulse shapers 90 and 53 or downstream.
  • Another output of the first frequency divider 6 is connected to the input of a third frequency divider 59, which is supplied with the output pulses of the control winding via the pulse shaper 90 at a further input.
  • the output of the third frequency divider 59 is connected via a gate 58 and an output amplifier 88 to the drive winding of the synchronous motor SM, so that the motor speed is directly dependent on the output pulses of the third frequency divider 59.
  • the bistable multivibrator 50 switches the gate 58 between the third frequency divider 59 and the output amplifier 88 after the input of a desired pulse with a frequency of, for example, 1 Hz, which is emitted by the second frequency divider 7, the third frequency divider 59 causing the Synchronous motor SM is accelerated to the maximum set speed. If the control pulse emitted by the motor pulse divider 91 is now present at the second input of the bistable multivibrator 50, i.e. the required speed frequency of e.g. 16 Hz reached, the gate 58 is blocked between the third frequency divider 59 and the output amplifier 88. As a result, no drive pulse is supplied to the synchronous motor SM and the speed of the motor drops as a result of the friction of the pointer gear until the next setpoint pulse switches over the bistable flip-flop 50.
  • the detailed circuit of a quartz analog alarm clock shown in FIG. 2 has a time reference circuit which essentially consists of an oscillating circuit and a frequency-determined quartz 1.
  • the resonant circuit contains an inverter 2, which is designed as an amplifier with infinitely high amplification, and a feedback resistor 3.
  • Two capacitors 4, 5 are connected to the connections of the oscillating crystal 1 on the one hand and to ground, on the other hand, a trimming capacitor 4 with which the exact oscillation frequency can be set, and a load capacitor 5, which has approximately the same capacitance as the trimming capacitor 4 in its central position.
  • the time reference circuit provides a frequency of 4,194,304 Hz, which is divided down in the downstream frequency dividers 6, 7 and 59.
  • the first frequency section 6 twenty-two flip-flops 8-20 are connected in series, so that the 4.19 MHz signal present at the input of the first frequency divider 6 is divided down to a frequency of 512 Hz.
  • the output of the last divider stage 20 of the first frequency divider 6 is connected to the input of the first divider stage 21 of the second frequency divider 7 and to the first divider stage 21 of the second frequency divider 7 and to the first divider stage 60 of the third frequency divider 59.
  • the NOR gate 52 connected downstream of the D flip-flop 51 of the pulse shaper 49 receives both the second pulses emitted by the second frequency divider 7 and the pulses emitted by the Q output of the D flip flop 51. At the output of NOR gate 52 there are pulses with a pulse interval of one second and a pulse width of on.
  • a separate pulse shaper 53 is provided, which consists of a D flip-flop 54 and a NOR gate 55.
  • the 1 Hz actual signal of the clock motor and a 2048 Hz signal from the output of the frequency divider stage 18 of the first frequency divider 6 are fed to this pulse shaper 53.
  • This pulse shaper 53 there is a 1-second actual pulse series with a pulse width of at the output of NOR gate 55 at.
  • the RS flip-flop 50 which consists of two cross-coupled NOR gates 56, 57, thus receives 49 desired pulses from the NOR gate 52 of the pulse shaper, while it receives 53 actual pulses from the NOR gate 55 of the pulse shaper .
  • the spacing of the two pulse series is 1 second in both cases, the pulse widths of the respective pulse series being different by a factor of 2 so that the actual value remains dominant.
  • the pulse width-modulated time deviation now corrects the amplitudes of the sinusoidal signals with which the working winding 87 of the clock motor is applied.
  • this loading is not carried out without prior modification by a NAND gate 58, which is supplied at its second input with signals from the third frequency divider 59, which consists of six flip-flops 60-65.
  • This third frequency divider 59 has its input connected to the 512 Hz output of the first frequency divider 6. As already mentioned, the output of the third frequency divider 59 is at the NAND gate 58. With the aid of the six flip-flops 60-65, the third frequency divider 59 can divide the frequency down from 512 Hz to 8 Hz. A special feature of the third frequency divider 59 is that it can be set via a line 67. Since the flip-flops 60-65 have the set inputs R, S, R, S, R, R, this means that the binary number LOLO can be represented with the flip-flops 63, 62, 61, 60, which corresponds to the decimal number 10 . To set this number, a pulse on line 67 is sufficient.
  • the output element for recording the actual time is the control winding 68 of the electronically controlled motor, which is acted upon by the continuously rotating motor in such a way that a voltage arises in it, which is a measure of the rotational speed of the motor. This voltage induced in the control winding 68 is then further processed and processed.
  • a capacitor 69 is provided, the task of which is to short-circuit any interference voltage peaks.
  • a center tap of a voltage divider comprising the resistors 70, 71 is connected, this in turn being connected to a battery 72.
  • This measure ensures that the AC voltage potential occurring at the control winding 68 is raised by a DC component, so that the first inverter 73, which is also an input threshold value switch, switches through at the correct times of the actual AC voltage signal and thus switches to the AC voltage. Actual signal exactly assigned rectangular signal generated.
  • a connection leads to the R inputs of two flip-flops 74, 75 and to the input of a second inverter 76, the output of which is connected to the D input of the flip-flop 74.
  • the C inputs of the flip-flops 74, 75 are connected to the output of the flip-flop 21 of the second frequency divider 6 via a third inverter 77.
  • the digital filter 92 is built up, which filters out the frequencies above the frequency 256 Hz.
  • the filter frequency could be another frequency instead of 256 Hz. it is only important that the 16 Hz frequency normally present at the control winding 68 is passed.
  • This pulse shaper 90 After the digitized and digitally filtered actual signal has passed through the digital filter 92, it arrives at a pulse shaper 90 which produces a needle pulse sequence from the relatively wide 16 Hz signal.
  • This pulse shaper 90 consists of two flip-flops 78, 79, a NOR gate 80 and an inverter 81, the inverter 81 being fed from the frequency divider 6 with a 2048 Hz signal.
  • 16 Hz pulses are thus present at the output of NOR gate 80, which have a base width of exhibit.
  • These 16 Hz needle pulses now control a further inverter 82 and a motor pulse shaper with four flip-flops 83, 84, 85, 86, which delivers a 1 Hz actual signal at the output.
  • this actual signal is sent to the pulse shaper 53 and to the NAND gate 43.
  • the NAND gate 43 can also receive a 1 Hz signal from the flip-flop 29 as well.
  • the flip-flops 60-65 are thus set to a dual number, e.g. a dual number that corresponds to the decimal number 10.
  • the input of the divider 59 is subjected to 512 Hz pulses until the divider has the decimal counter 32, i.e. until an H signal is present at the output of the divider 59.
  • the divider 59 acts as a timing element that determines the point in time at which a correction pulse is applied to the electrical signal supplied to the electronically controlled motor. After the starting point has been clearly defined by the signal coming from gate 80, the correction signal is then released at gate 58 after a precisely predetermined time.
  • Correction signals are thus fed to the AC drive pulses of the working winding 87 via a field effect transistor 88 serving as an output amplifier and a resistor 89.
  • These correction signals increase the amplitude of the electrical drive signal which is present at the working winding 87 by an amount which corresponds to the frequency deviation of the watch.
  • the increase in the amplitude can vary from half-wave to half-wave of the AC signal present at the working winding 87, the variation depending on the determined control deviation between the setpoint and actual value.
  • the resistor 89 only has the task of weakening the correction pulses supplied to the working winding 87, depending on the drive energy required. If, for example, relatively heavy clock hands are moved with the clock motor, the resistor 76 can be selected to be very small so that the working winding 87 is acted upon with a large amount of energy.
  • the pulse has a pulse width of less than 1.98 msec, D / 74 H.
  • the comparison frequency e.g. 256 Hz, switches from 74 to H. 75 with its positive edge at C / 74 Q, but does not switch further because the third inverter 77 is present at C / 75 L.
  • the output of the first inverter becomes 74 H.
  • the D flip-flops 74 and 75 are reset before the signal at the D and C inputs of the D flip-flop 75 can be switched on.
  • the downstream pulse shaper stage 90 now ensures that when changing from H to L at the output of the pulse shaper stage 90 a needle pulse is generated which is independent of the pulse width of the input signal and e.g. has a pulse width of approx. 0.25 msec.
  • the comparison frequency necessary for pulse shaping is taken from the first frequency divider 6.

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Control Of Stepping Motors (AREA)
  • Electromechanical Clocks (AREA)

Abstract

L'horloge comporte un affichage analogique, un oscillateur a quartz (1) et des diviseurs de frequence electroniques (6, 7). Les elements indicateurs sont entraines par un moteur (SM) commande electroniquement et comportant un enroulement de travail (87) et un enroulement de commande (68). Le circuit de commande et de reglage du moteur (SM) est agence de maniere a permettre d'ajuster la vitesse de rotation uniquement a une vitesse superieure a la vitesse de rotation nominale et, lors d'une variation de frequence de l'horloge, a ajouter des signaux de correction aux impulsions de commande de l'enroulement de travail (87), lesdites impulsions ayant la forme d'un courant alternatif, a travers une bascule bistable (50), a laquelle sont appliquees les impulsions derivees des diviseurs de frequence (6, 7) et les impulsions derivees du moteur (SM), une porte NON-ET (58) reliee a une sortie de la bascule (50) et a un autre diviseur de frequence (50) un transistor a effet de champ (88) et une resistance (89). Ces signaux de correction augmentent l'amplitude du signal electrique d'actionnement propre a l'enroulement de travail (87) et accelerent le moteur (SM) a la vitesse de rotation maximale ajustee.

Claims (3)

1. Garde-temps, et notamment montre commandée par quartz, comportant un oscillateur (1) , des diviseurs de fréquence électroniques (6, 7) et un moteur SM commandé électroniquement et comprenant un enroulement de travail (87) pour l'entraînement d'un système indicateur et un enroulement de commande (68) qui délivre des impulsions, proportionnelles à la vitesse de rotation du moteur, à l'entrée de remise à 1 d'une bascule bistable (50), à l'entrée de remise à 0 de laquelle sont appliquées les impulsions de l'oscillateur correspondant à la fréquence des impulsions moteur et divisées par un premier diviseur de fréquence (6), une seule vitesse de rotation du moteur à commande électronique supérieure à la vitesse nominale pouvant être commandée, et la sortie de la bascule bistable (50) étant reliée à une entrée d'un opérateur (58), dont la seconde entrée est reliée à la sortie d'un troisième diviseur de fréquence (59) monté en aval du premier diviseur de fréquence et dont la sortie attaque l'enroulement de travail (87) du moteur par l'intermédiaire d'un amplificateur de sortie (88), ledit garde-temps étant caractérisé en ce qu'un premier inverseur (73) servant d'interrupteur d'entrée à seuil est relié à l'enroulement de commande (68) du moteur à commande électronique et produit un signal rectangulaire à partir du signal en tension alternative délivré par l'enrolument de commande (68) dudit moteur; et le premier inverseur (73) est relié à un filtre numérique (92) avec un conformateur d'impulsions (90) en aval pour la production, à partir du flanc décroissant du signal rectangulaire, d'une impulsion étroite qui ne transmet pas des impulsions parasites de durée ajustable et dont la fréquence de déclenchement est prélevée sur le premier diviseur de fréquence (6) monté en aval de l'oscillateur (1).
2. Garde-temps selon là revendication 1, caractérisé en ce que le filtre numérique (92) comporte un second inverseur (76), monté en aval du premier inverseur (73), deux bascules D (74, 75) et un troisième inverseur (77), les entrées de remise à 0 (R) des bascules D (74, 75) étant reliées à la sortie du premier inverseur (73) et les entrées d'horloge (C) des bascules D (74, 75) à une sortie du troisième diviseur de fréquence (21, 29) monté en aval du premier diviseur de fréquence (6), directement ou par l'intermédiaire du troisième inverseur (77), et l'entrée D de la première bascule D (74) étant reliée à la sortie du second inverseur (76) et l'entrée D de la seconde bascule D (75) à la sortie inverseuse (Q) de la première bascule D (74).
3. Garde-temps selon une des revendications 1 ou 2, caractérisé en ce que le conformateur d'impulsions (90) est constitué par un multivibrateur mono- stable qui, par l'intermédiaire d'une chaîne de division des impulsions moteur (91) et d'un premier conformateur d'impulsions (53), attaque l'entrée de remise à 1 (S) de la bascule bistable (50) connectée en bascule RS et dont l'entrée de remise à 0 (R) est attaquée par l'intermédiaire d'un second conformateur d'impulsions (49), par le premier diviseur de fréquence (6) ou par le troisième diviseur de fréquence (21-29) monté en aval du premier diviseur de fréquence (6).
EP79901536A 1978-11-20 1980-06-03 Garde-temps,en particulier horloge pilotee a quartz Expired EP0023490B1 (fr)

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
DE2850357 1978-11-20
DE19782850357 DE2850357A1 (de) 1978-11-20 1978-11-20 Zeithaltendes geraet, insbesondere quartzgesteuerte uhr
DE19782850295 DE2850295C3 (de) 1978-11-20 1978-11-20 Zeithaltendees Gerät, insbesondere Quarzgroßuhr mit elektronisch geregeltem Anzeigesystem
DE2850325 1978-11-20
DE2850295 1978-11-20
DE19782850325 DE2850325C3 (de) 1978-11-20 1978-11-20 Zeithaltendes Gerät, insbesondere Quarzgroßuhr mit elektronisch geregeltem Anzeigesystem

Publications (2)

Publication Number Publication Date
EP0023490A1 EP0023490A1 (fr) 1981-02-11
EP0023490B1 true EP0023490B1 (fr) 1983-07-20

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
EP79901536A Expired EP0023490B1 (fr) 1978-11-20 1980-06-03 Garde-temps,en particulier horloge pilotee a quartz

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US (1) US4417820A (fr)
EP (1) EP0023490B1 (fr)
JP (1) JPS55501033A (fr)
WO (1) WO1980001113A1 (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3215440A1 (de) * 1982-04-24 1983-10-27 Braun Ag, 6000 Frankfurt Verfahren und anordnung zur steuerung und regelung insbesondere eines uhrenmotors mit permanentmagnetischem laeufer
CN101486682B (zh) 2002-03-13 2013-08-14 阵列生物制药公司 作为mek抑制剂的n3烷基化苯并咪唑衍生物

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Publication number Priority date Publication date Assignee Title
DE1591218A1 (de) * 1967-03-09 1970-12-17 Junghans Gmbh Geb Quarzgesteuerter Transistor-Oszillator
US3478178A (en) * 1967-03-24 1969-11-11 Fowler Allan R Switched frequency and phase comparator
US4041362A (en) * 1970-01-23 1977-08-09 Canon Kabushiki Kaisha Motor control system
DE2118057C3 (de) * 1971-04-14 1975-01-09 Forschungsgesellschaft Fuer Uhrenund Feingeraete-Technik E.V., 7000 Stuttgart Zeithaltendes Gerät mit einem von einem Antriebsmotor angetriebenen Anzeigesystem, dessen Stand periodisch korrigiert wird
US3807164A (en) * 1972-10-16 1974-04-30 Timex Corp Synchronized quartz crystal watch
US3967442A (en) * 1973-02-01 1976-07-06 Berney Jean Claude Electric watch having an electromechanical movement including a correction mechanism for small errors
DE2305682C3 (de) * 1973-02-06 1978-10-05 Hubert Dipl.-Ing. 7141 Neckargroeningen Effenberger Zeithaltendes Gerät, insbesondere Quarzarmbanduhr mit elektronisch geregeltem Anzeigesystem
DE2312412C2 (de) * 1973-03-13 1979-03-15 Eurosil Gmbh, 8000 Muenchen Verfahren zur Synchronisation eines elektrodynamischen Uhrenantriebs
JPS5744951B2 (fr) * 1973-08-23 1982-09-24
US3940919A (en) * 1973-10-03 1976-03-02 Citizen Watch Co., Ltd. Electronic wristwatch with electronic sound emitter device
US4036006A (en) * 1974-02-06 1977-07-19 Gunther Glaser Time-keeping apparatus
CH588111B5 (fr) * 1974-02-13 1977-05-31 Berney Sa Jean Claude
JPS525566A (en) * 1975-07-02 1977-01-17 Citizen Watch Co Ltd Electric clock
JPS5276063A (en) * 1975-12-22 1977-06-25 Seiko Instr & Electronics Ltd Electronic wrist watch
JPS5312667A (en) * 1976-07-21 1978-02-04 Seiko Instr & Electronics Ltd Alarm electronic watch
JPS5312669A (en) * 1976-07-21 1978-02-04 Seiko Instr & Electronics Ltd Hands reversing device of electronic watch
JPS5394975A (en) * 1977-01-28 1978-08-19 Seiko Epson Corp Electronic watch
JPS53132381A (en) * 1977-04-23 1978-11-18 Seiko Instr & Electronics Ltd Electronic watch

Also Published As

Publication number Publication date
JPS55501033A (fr) 1980-11-27
EP0023490A1 (fr) 1981-02-11
WO1980001113A1 (fr) 1980-05-29
US4417820A (en) 1983-11-29

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