DK0660428T3 - Fremgangsmåde til dannelse af et trin på en aflejringsoverflade af et substrat til en superledende indretning, der anvender en oxidsuperleder - Google Patents

Fremgangsmåde til dannelse af et trin på en aflejringsoverflade af et substrat til en superledende indretning, der anvender en oxidsuperleder

Info

Publication number
DK0660428T3
DK0660428T3 DK94402527T DK94402527T DK0660428T3 DK 0660428 T3 DK0660428 T3 DK 0660428T3 DK 94402527 T DK94402527 T DK 94402527T DK 94402527 T DK94402527 T DK 94402527T DK 0660428 T3 DK0660428 T3 DK 0660428T3
Authority
DK
Denmark
Prior art keywords
substrate
forming
oxide superconductor
deposition surface
superconducting device
Prior art date
Application number
DK94402527T
Other languages
English (en)
Inventor
Tatsuoki Nagaishi
Original Assignee
Sumitomo Electric Industries
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP5348838A external-priority patent/JPH0779021A/ja
Application filed by Sumitomo Electric Industries filed Critical Sumitomo Electric Industries
Application granted granted Critical
Publication of DK0660428T3 publication Critical patent/DK0660428T3/da

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00—Superconducting devices
    • H10N60/01—Manufacture or treatment
    • H10N60/0912—Manufacture or treatment of Josephson-effect devices
    • H10N60/0941—Manufacture or treatment of Josephson-effect devices comprising high-Tc ceramic materials

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Superconductor Devices And Manufacturing Methods Thereof (AREA)
  • Superconductors And Manufacturing Methods Therefor (AREA)
DK94402527T 1993-12-27 1994-11-08 Fremgangsmåde til dannelse af et trin på en aflejringsoverflade af et substrat til en superledende indretning, der anvender en oxidsuperleder DK0660428T3 (da)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5348838A JPH0779021A (ja) 1993-07-15 1993-12-27 成膜用基板に段差を形成する方法

Publications (1)

Publication Number Publication Date
DK0660428T3 true DK0660428T3 (da) 2001-12-27

Family

ID=18399727

Family Applications (1)

Application Number Title Priority Date Filing Date
DK94402527T DK0660428T3 (da) 1993-12-27 1994-11-08 Fremgangsmåde til dannelse af et trin på en aflejringsoverflade af et substrat til en superledende indretning, der anvender en oxidsuperleder

Country Status (7)

Country Link
US (1) US5560836A (da)
EP (1) EP0660428B1 (da)
KR (1) KR100297531B1 (da)
CA (1) CA2135500C (da)
DE (1) DE69428182T2 (da)
DK (1) DK0660428T3 (da)
FI (1) FI111198B (da)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998050965A1 (en) * 1997-05-02 1998-11-12 Superconductor Technologies, Inc. Method for preparation of substrates for thin film superconductors and improved devices incorporating substrates
DE19808778C2 (de) * 1998-03-03 1999-12-09 Forschungszentrum Juelich Gmbh Verfahren zur Herstellung eines ABO¶3¶-Substrates mit einer Stufe
AUPP590798A0 (en) * 1998-09-14 1998-10-08 Commonwealth Scientific And Industrial Research Organisation Method of manufacture of high temperature superconductors
US6734699B1 (en) 1999-07-14 2004-05-11 Northrop Grumman Corporation Self-clocked complementary logic
US7015499B1 (en) 1999-12-01 2006-03-21 D-Wave Systems, Inc. Permanent readout superconducting qubit
US6459097B1 (en) * 2000-01-07 2002-10-01 D-Wave Systems Inc. Qubit using a Josephson junction between s-wave and d-wave superconductors
US6627915B1 (en) 2000-08-11 2003-09-30 D-Wave Systems, Inc. Shaped Josephson junction qubits
US6504172B2 (en) 2001-03-16 2003-01-07 D-Wave Systems, Inc. Superconducting dot/anti-dot flux qubit based on time-reversal symmetry breaking effects
US7002366B2 (en) * 2003-08-20 2006-02-21 Northrop Grumman Corporation Superconducting constant current source
US20050062131A1 (en) * 2003-09-24 2005-03-24 Murduck James Matthew A1/A1Ox/A1 resistor process for integrated circuits
EP1982670B1 (en) * 2007-04-19 2009-09-02 Straumann Holding AG Process for providing a topography to the surface of a dental implant

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0810757B2 (ja) * 1987-05-25 1996-01-31 松下電子工業株式会社 半導体装置の製造方法
US5077266A (en) * 1988-09-14 1991-12-31 Hitachi, Ltd. Method of forming weak-link josephson junction, and superconducting device employing the junction
JPH05251771A (ja) * 1991-12-02 1993-09-28 Sumitomo Electric Ind Ltd 人工粒界型ジョセフソン接合素子およびその作製方法
JP2730368B2 (ja) * 1991-12-10 1998-03-25 住友電気工業株式会社 超電導電界効果型素子およびその作製方法
JPH05335638A (ja) * 1992-05-29 1993-12-17 Sumitomo Electric Ind Ltd ジョセフソン接合構造体およびその作製方法
KR100264006B1 (ko) * 1993-11-29 2000-08-16 이형도 고온초전도 조셉슨소자의 제조방법
US5780343A (en) * 1995-12-20 1998-07-14 National Semiconductor Corporation Method of producing high quality silicon surface for selective epitaxial growth of silicon

Also Published As

Publication number Publication date
US5560836A (en) 1996-10-01
FI945234A0 (fi) 1994-11-07
DE69428182D1 (de) 2001-10-11
DE69428182T2 (de) 2002-03-28
CA2135500A1 (en) 1995-06-28
EP0660428A3 (en) 1997-07-16
KR100297531B1 (ko) 2001-10-24
FI111198B (fi) 2003-06-13
EP0660428A2 (en) 1995-06-28
EP0660428B1 (en) 2001-09-05
FI945234L (fi) 1995-06-28
CA2135500C (en) 2000-05-02

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