DE69927456D1 - Verwaltung eines FIFO zur Abalufverfolgung - Google Patents

Verwaltung eines FIFO zur Abalufverfolgung

Info

Publication number
DE69927456D1
DE69927456D1 DE69927456T DE69927456T DE69927456D1 DE 69927456 D1 DE69927456 D1 DE 69927456D1 DE 69927456 T DE69927456 T DE 69927456T DE 69927456 T DE69927456 T DE 69927456T DE 69927456 D1 DE69927456 D1 DE 69927456D1
Authority
DE
Germany
Prior art keywords
instruction
instructions
processor
buffer
execution
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69927456T
Other languages
English (en)
Other versions
DE69927456T2 (de
DE69927456T8 (de
Inventor
Mark L Buser
Gilbert Nmi Laurenti
N M Ganesh
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Application granted granted Critical
Publication of DE69927456D1 publication Critical patent/DE69927456D1/de
Publication of DE69927456T2 publication Critical patent/DE69927456T2/de
Publication of DE69927456T8 publication Critical patent/DE69927456T8/de
Active legal-status Critical Current

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Classifications

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    • G06F7/76—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data
    • G06F7/764—Masking
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/01—Methods or arrangements for data conversion without changing the order or content of the data handled for shifting, e.g. justifying, scaling, normalising
    • G—PHYSICS
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    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
    • G06F7/607—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers number-of-ones counters, i.e. devices for counting the number of input lines set to ONE among a plurality of input lines, also called bit counters or parallel counters
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    • G06F7/74—Selecting or encoding within a word the position of one or more bits having a specified value, e.g. most or least significant one or zero detection, priority encoders
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    • G06F9/30181—Instruction operation extension or modification
    • G06F9/30189—Instruction operation extension or modification according to execution mode, e.g. mode flag
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    • G06F9/322—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
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    • G—PHYSICS
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    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
    • G06F9/355—Indexed addressing
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    • G—PHYSICS
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    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
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    • G—PHYSICS
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    • G—PHYSICS
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    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
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    • G06F9/3838—Dependency mechanisms, e.g. register scoreboarding
    • G06F9/384—Register renaming
    • G—PHYSICS
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    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
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    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
    • G06F9/3856—Reordering of instructions, e.g. using queues or age tags
    • G—PHYSICS
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    • G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
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    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3877—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor
    • G06F9/3879—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor for non-native instruction execution, e.g. executing a command; for Java instruction set
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    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G—PHYSICS
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    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G06F9/3889—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by multiple instructions, e.g. MIMD, decoupled access or execute
    • G06F9/3891—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by multiple instructions, e.g. MIMD, decoupled access or execute organised in groups of units sharing resources, e.g. clusters
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K13/00—Conveying record carriers from one station to another, e.g. from stack to punching mechanism
    • G06K13/02—Conveying record carriers from one station to another, e.g. from stack to punching mechanism the record carrier having longitudinal dimension comparable with transverse dimension, e.g. punched card
    • G06K13/08—Feeding or discharging cards
    • G06K13/0806—Feeding or discharging cards using an arrangement for ejection of an inserted card
    • G06K13/0825—Feeding or discharging cards using an arrangement for ejection of an inserted card the ejection arrangement being of the push-push kind

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Analysis (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Debugging And Monitoring (AREA)
  • Microcomputers (AREA)
  • Advance Control (AREA)
  • Power Sources (AREA)
  • Executing Machine-Instructions (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
DE69927456T 1998-10-06 1999-03-08 Verwaltung eines FIFO zur Ablaufverfolgung Active DE69927456T8 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP98402455 1998-10-06
EP98402455A EP0992916A1 (de) 1998-10-06 1998-10-06 Digitaler Signalprozessor

Publications (3)

Publication Number Publication Date
DE69927456D1 true DE69927456D1 (de) 2005-11-03
DE69927456T2 DE69927456T2 (de) 2006-06-22
DE69927456T8 DE69927456T8 (de) 2006-12-14

Family

ID=8235512

Family Applications (5)

Application Number Title Priority Date Filing Date
DE69932481T Expired - Lifetime DE69932481T2 (de) 1998-10-06 1999-03-08 Kellerzeigerverwaltung
DE69942482T Expired - Lifetime DE69942482D1 (de) 1998-10-06 1999-03-08 Cachespeicherkohärenz während der Emulation
DE69942080T Expired - Lifetime DE69942080D1 (de) 1998-10-06 1999-03-08 Speicherzugriff mit Bytequalifizierer
DE69927456T Active DE69927456T8 (de) 1998-10-06 1999-03-08 Verwaltung eines FIFO zur Ablaufverfolgung
DE69926458T Expired - Lifetime DE69926458T2 (de) 1998-10-06 1999-03-08 Vorrichtung und Verfahren für einen Software-Haltepunkt während eines Verzögerungsschlitzes

Family Applications Before (3)

Application Number Title Priority Date Filing Date
DE69932481T Expired - Lifetime DE69932481T2 (de) 1998-10-06 1999-03-08 Kellerzeigerverwaltung
DE69942482T Expired - Lifetime DE69942482D1 (de) 1998-10-06 1999-03-08 Cachespeicherkohärenz während der Emulation
DE69942080T Expired - Lifetime DE69942080D1 (de) 1998-10-06 1999-03-08 Speicherzugriff mit Bytequalifizierer

Family Applications After (1)

Application Number Title Priority Date Filing Date
DE69926458T Expired - Lifetime DE69926458T2 (de) 1998-10-06 1999-03-08 Vorrichtung und Verfahren für einen Software-Haltepunkt während eines Verzögerungsschlitzes

Country Status (3)

Country Link
US (1) US6658578B1 (de)
EP (1) EP0992916A1 (de)
DE (5) DE69932481T2 (de)

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