DE69919941D1 - Modellierungsverfahren und Simulationsverfahren - Google Patents

Modellierungsverfahren und Simulationsverfahren

Info

Publication number
DE69919941D1
DE69919941D1 DE69919941T DE69919941T DE69919941D1 DE 69919941 D1 DE69919941 D1 DE 69919941D1 DE 69919941 T DE69919941 T DE 69919941T DE 69919941 T DE69919941 T DE 69919941T DE 69919941 D1 DE69919941 D1 DE 69919941D1
Authority
DE
Germany
Prior art keywords
modeling
simulation processes
simulation
processes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69919941T
Other languages
English (en)
Other versions
DE69919941T2 (de
Inventor
Shoichi Chikamichi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of DE69919941D1 publication Critical patent/DE69919941D1/de
Application granted granted Critical
Publication of DE69919941T2 publication Critical patent/DE69919941T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/36—Circuit design at the analogue level
    • G06F30/367—Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Geometry (AREA)
  • Evolutionary Computation (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Management, Administration, Business Operations System, And Electronic Commerce (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Structure Of Printed Boards (AREA)
DE69919941T 1998-06-17 1999-06-16 Modellierungsverfahren und Simulationsverfahren Expired - Fee Related DE69919941T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP10169447A JP3050309B2 (ja) 1998-06-17 1998-06-17 モデリング方法およびシミュレーション方法
JP16944798 1998-06-17

Publications (2)

Publication Number Publication Date
DE69919941D1 true DE69919941D1 (de) 2004-10-14
DE69919941T2 DE69919941T2 (de) 2005-09-15

Family

ID=15886781

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69919941T Expired - Fee Related DE69919941T2 (de) 1998-06-17 1999-06-16 Modellierungsverfahren und Simulationsverfahren

Country Status (4)

Country Link
US (2) US6519556B1 (de)
EP (1) EP0965931B1 (de)
JP (1) JP3050309B2 (de)
DE (1) DE69919941T2 (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3050309B2 (ja) * 1998-06-17 2000-06-12 日本電気株式会社 モデリング方法およびシミュレーション方法
JP2002222230A (ja) * 2000-11-27 2002-08-09 Matsushita Electric Ind Co Ltd 不要輻射最適化方法および不要輻射解析方法
JP3569681B2 (ja) * 2001-02-02 2004-09-22 株式会社半導体理工学研究センター 半導体集積回路における電源電流波形の解析方法及び解析装置
US7089171B2 (en) * 2002-10-24 2006-08-08 International Business Machines Corporation Method for characterizing the accuracy of a simulated electrical circuit model
JP2004334654A (ja) * 2003-05-09 2004-11-25 Fujitsu Ltd 電源ノイズ解析モデル生成装置、電源ノイズ解析モデル生成方法、電源ノイズ解析モデル生成プログラム
US7000203B2 (en) * 2003-11-12 2006-02-14 International Business Machines Corporation Efficient and comprehensive method to calculate IC package or PCB trace mutual inductance using circular segments and lookup tables
US7243313B1 (en) * 2003-11-24 2007-07-10 Cadence Design Systems, Inc. System and method for reducing the size of RC circuits
JP6011975B2 (ja) * 2013-05-14 2016-10-25 日本電信電話株式会社 電磁ノイズの伝搬路を追跡および可視化する方法および装置
JP5773101B2 (ja) * 2013-05-14 2015-09-02 株式会社村田製作所 コンデンサのシミュレーション方法並びにコンデンサのシミュレーション装置およびその使用方法
CN105045952B (zh) * 2015-05-29 2018-07-06 许继电气股份有限公司 模块化多电平换流器多维度建模方法与仿真方法
CN111596567B (zh) * 2020-04-27 2023-04-21 南方电网科学研究院有限责任公司 一种交直流电力系统电磁暂态仿真装置

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3597708A (en) 1969-12-31 1971-08-03 Raytheon Co Broadband radio frequency transmission line termination
US3678395A (en) 1970-10-14 1972-07-18 Gte Sylvania Inc Broadband planar balanced circuit
US5400042A (en) 1992-12-03 1995-03-21 California Institute Of Technology Dual frequency, dual polarized, multi-layered microstrip slot and dipole array antenna
US5545949A (en) 1994-07-29 1996-08-13 Litton Industries, Inc. Coaxial transmissioin line input transformer having externally variable eccentricity and position
US5621422A (en) 1994-08-22 1997-04-15 Wang-Tripp Corporation Spiral-mode microstrip (SMM) antennas and associated methods for exciting, extracting and multiplexing the various spiral modes
US5600286A (en) 1994-09-29 1997-02-04 Hughes Electronics End-on transmission line-to-waveguide transition
US5504423A (en) * 1994-11-01 1996-04-02 The Research Foundation Of State University Of New York Method for modeling interactions in multilayered electronic packaging structures
JP3050309B2 (ja) * 1998-06-17 2000-06-12 日本電気株式会社 モデリング方法およびシミュレーション方法

Also Published As

Publication number Publication date
JP3050309B2 (ja) 2000-06-12
US7062424B2 (en) 2006-06-13
EP0965931A2 (de) 1999-12-22
JP2000002752A (ja) 2000-01-07
DE69919941T2 (de) 2005-09-15
US6519556B1 (en) 2003-02-11
US20030125919A1 (en) 2003-07-03
EP0965931A3 (de) 2003-08-06
EP0965931B1 (de) 2004-09-08

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee