DE69734341D1 - Leiterplatte für Leistungsmodul - Google Patents
Leiterplatte für LeistungsmodulInfo
- Publication number
- DE69734341D1 DE69734341D1 DE69734341T DE69734341T DE69734341D1 DE 69734341 D1 DE69734341 D1 DE 69734341D1 DE 69734341 T DE69734341 T DE 69734341T DE 69734341 T DE69734341 T DE 69734341T DE 69734341 D1 DE69734341 D1 DE 69734341D1
- Authority
- DE
- Germany
- Prior art keywords
- pcb
- power module
- module
- power
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
- H01L23/15—Ceramic or glass substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S428/00—Stock material or miscellaneous articles
- Y10S428/91—Product with molecular orientation
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
- Y10T428/24802—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
- Y10T428/24917—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including metal layer
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
- Y10T428/24802—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
- Y10T428/24926—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including ceramic, glass, porcelain or quartz layer
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Chemical & Material Sciences (AREA)
- Ceramic Engineering (AREA)
- Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Ceramic Products (AREA)
- Insulated Metal Substrates For Printed Circuits (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8244075A JPH1067586A (ja) | 1996-08-27 | 1996-08-27 | パワーモジュール用回路基板およびその製造方法 |
JP24407596 | 1996-08-27 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69734341D1 true DE69734341D1 (de) | 2006-02-23 |
DE69734341T2 DE69734341T2 (de) | 2006-07-06 |
Family
ID=17113370
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69734341T Expired - Lifetime DE69734341T2 (de) | 1996-08-27 | 1997-08-27 | Leiterplatte für Leistungsmodul |
Country Status (4)
Country | Link |
---|---|
US (1) | US6013357A (de) |
EP (1) | EP0833383B1 (de) |
JP (1) | JPH1067586A (de) |
DE (1) | DE69734341T2 (de) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5038565B2 (ja) | 2000-09-22 | 2012-10-03 | 株式会社東芝 | セラミックス回路基板およびその製造方法 |
US6726996B2 (en) | 2001-05-16 | 2004-04-27 | International Business Machines Corporation | Laminated diffusion barrier |
WO2005098942A1 (ja) * | 2004-04-05 | 2005-10-20 | Mitsubishi Materials Corporation | Ai/ain接合体、パワーモジュール用基板及びパワーモジュール並びにai/ain接合体の製造方法 |
JP5440947B2 (ja) * | 2010-03-31 | 2014-03-12 | 日立金属株式会社 | 窒化珪素基板の製造方法及び窒化珪素基板並びにそれを使用した回路基板 |
JP6396817B2 (ja) * | 2014-01-30 | 2018-09-26 | 京セラ株式会社 | 窒化珪素質基板およびこれを備える回路基板ならびに電子装置 |
JP6240034B2 (ja) * | 2014-06-27 | 2017-11-29 | 京セラ株式会社 | 窒化珪素質基板およびこれを備える回路基板ならびに電子装置 |
CN107369741A (zh) * | 2017-07-13 | 2017-11-21 | 东莞市凯昶德电子科技股份有限公司 | 带一体式金属围坝的led支架模组及其制备方法 |
CN112811912B (zh) * | 2021-01-20 | 2021-11-02 | 中国科学院上海硅酸盐研究所 | 一种高性能氮化硅陶瓷基片的批量化烧结方法 |
WO2024203965A1 (ja) * | 2023-03-24 | 2024-10-03 | 株式会社 東芝 | セラミックス基板、セラミックス回路基板、半導体装置、スラリーの製造方法、及び、離型剤塗布方法 |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1415522A (en) * | 1972-04-06 | 1975-11-26 | Lucas Industries Ltd | Method of manufacturing hot pressed cermaic material based on silicon nitride |
DE3376829D1 (en) * | 1982-06-29 | 1988-07-07 | Toshiba Kk | Method for directly bonding ceramic and metal members and laminated body of the same |
EP0235682B2 (de) * | 1986-02-20 | 1997-11-12 | Kabushiki Kaisha Toshiba | Gesinterter Körper aus Aluminiumnitrid mit leitender metallisierter Schicht |
EP0282285B1 (de) * | 1987-03-13 | 1990-11-14 | Kabushiki Kaisha Toshiba | Verfahren zur Metallisierung eines nitrid-keramischen Gegenstandes |
US4883704A (en) * | 1987-03-30 | 1989-11-28 | Kabushiki Kaisha Toshiba | Circuit substrate comprising nitride type ceramics, method for preparing it, and metallizing composition for use in it |
US4920640A (en) * | 1988-01-27 | 1990-05-01 | W. R. Grace & Co.-Conn. | Hot pressing dense ceramic sheets for electronic substrates and for multilayer electronic substrates |
JPH01203270A (ja) * | 1988-02-08 | 1989-08-16 | Sumitomo Electric Ind Ltd | 高熱伝導性窒化アルミニウム焼結体及びその製造法 |
JP2755594B2 (ja) * | 1988-03-30 | 1998-05-20 | 株式会社 東芝 | セラミックス回路基板 |
JP2628510B2 (ja) * | 1988-04-08 | 1997-07-09 | 新日本製鐵株式会社 | BN−AlN系複合焼結体の製造方法 |
JPH02149485A (ja) * | 1988-11-29 | 1990-06-08 | Toshiba Corp | セラミック基板の製造方法 |
JP2774560B2 (ja) * | 1989-03-31 | 1998-07-09 | 株式会社東芝 | 窒化アルミニウムメタライズ基板 |
JPH0393687A (ja) * | 1989-09-06 | 1991-04-18 | Toshiba Corp | 窒化アルミニウム基板の製造方法 |
JPH0413507A (ja) * | 1990-04-27 | 1992-01-17 | Sumitomo Electric Ind Ltd | ダイヤモンド被覆Si↓3N↓4焼結体製ドリル |
JPH04119975A (ja) * | 1990-09-07 | 1992-04-21 | Murata Mfg Co Ltd | セラミック基板と金属板との接合用治具 |
JP2555231B2 (ja) * | 1991-05-21 | 1996-11-20 | 富士通株式会社 | 窒化アルミニウム多層回路基板の製造方法 |
JPH05218229A (ja) * | 1992-01-28 | 1993-08-27 | Toshiba Corp | セラミック回路基板 |
JP2736949B2 (ja) * | 1992-07-28 | 1998-04-08 | 同和鉱業株式会社 | 高強度窒化アルミニウム回路基板およびその製造方法 |
EP0587119B1 (de) * | 1992-09-08 | 1998-01-07 | Kabushiki Kaisha Toshiba | Siliciumnitrid-Sinterkörper mit hoher Wärmeleitfähigkeit und Verfahren zu seiner Herstellung |
-
1996
- 1996-08-27 JP JP8244075A patent/JPH1067586A/ja active Pending
-
1997
- 1997-08-25 US US08/917,328 patent/US6013357A/en not_active Expired - Lifetime
- 1997-08-27 EP EP97810602A patent/EP0833383B1/de not_active Expired - Lifetime
- 1997-08-27 DE DE69734341T patent/DE69734341T2/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0833383B1 (de) | 2005-10-12 |
US6013357A (en) | 2000-01-11 |
EP0833383A2 (de) | 1998-04-01 |
EP0833383A3 (de) | 1998-07-29 |
DE69734341T2 (de) | 2006-07-06 |
JPH1067586A (ja) | 1998-03-10 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |