DE69733471D1 - Verfahren zur Herstellung von Geräten in einem halbleitenden Substrat - Google Patents
Verfahren zur Herstellung von Geräten in einem halbleitenden SubstratInfo
- Publication number
- DE69733471D1 DE69733471D1 DE69733471T DE69733471T DE69733471D1 DE 69733471 D1 DE69733471 D1 DE 69733471D1 DE 69733471 T DE69733471 T DE 69733471T DE 69733471 T DE69733471 T DE 69733471T DE 69733471 D1 DE69733471 D1 DE 69733471D1
- Authority
- DE
- Germany
- Prior art keywords
- manufacturing devices
- semiconductive substrate
- semiconductive
- substrate
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000000758 substrate Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
- H01L21/3043—Making grooves, e.g. cutting
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Element Separation (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
- Drying Of Semiconductors (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP97830335A EP0889505B1 (de) | 1997-07-03 | 1997-07-03 | Verfahren zur Herstellung von Geräten in einem halbleitenden Substrat |
Publications (1)
Publication Number | Publication Date |
---|---|
DE69733471D1 true DE69733471D1 (de) | 2005-07-14 |
Family
ID=8230695
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69733471T Expired - Fee Related DE69733471D1 (de) | 1997-07-03 | 1997-07-03 | Verfahren zur Herstellung von Geräten in einem halbleitenden Substrat |
Country Status (4)
Country | Link |
---|---|
US (1) | US6303472B1 (de) |
EP (1) | EP0889505B1 (de) |
JP (1) | JPH1187491A (de) |
DE (1) | DE69733471D1 (de) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2809867B1 (fr) * | 2000-05-30 | 2003-10-24 | Commissariat Energie Atomique | Substrat fragilise et procede de fabrication d'un tel substrat |
US6579738B2 (en) * | 2000-12-15 | 2003-06-17 | Micron Technology, Inc. | Method of alignment for buried structures formed by surface transformation of empty spaces in solid state materials |
US20040084407A1 (en) * | 2002-10-31 | 2004-05-06 | Nptest, Inc. | Method for surface preparation to enable uniform etching of polycrystalline materials |
EP1864121A2 (de) * | 2005-03-14 | 2007-12-12 | QC Solutions, Inc. | Halbleiterwafermetrologie-vorrichtung und -verfahren |
US7657390B2 (en) * | 2005-11-02 | 2010-02-02 | Applied Materials, Inc. | Reclaiming substrates having defects and contaminants |
JP4720587B2 (ja) * | 2006-04-10 | 2011-07-13 | 株式会社デンソー | 超音波センサ |
US8124506B2 (en) * | 2008-08-14 | 2012-02-28 | Varian Semiconductor Equipment Associates, Inc. | USJ techniques with helium-treated substrates |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3982967A (en) * | 1975-03-26 | 1976-09-28 | Ibm Corporation | Method of proton-enhanced diffusion for simultaneously forming integrated circuit regions of varying depths |
US4749660A (en) * | 1986-11-26 | 1988-06-07 | American Telephone And Telegraph Company, At&T Bell Laboratories | Method of making an article comprising a buried SiO2 layer |
GB8725497D0 (en) * | 1987-10-30 | 1987-12-02 | Atomic Energy Authority Uk | Isolation of silicon |
FR2681472B1 (fr) * | 1991-09-18 | 1993-10-29 | Commissariat Energie Atomique | Procede de fabrication de films minces de materiau semiconducteur. |
US5416043A (en) * | 1993-07-12 | 1995-05-16 | Peregrine Semiconductor Corporation | Minimum charge FET fabricated on an ultrathin silicon on sapphire wafer |
FR2714524B1 (fr) * | 1993-12-23 | 1996-01-26 | Commissariat Energie Atomique | Procede de realisation d'une structure en relief sur un support en materiau semiconducteur |
FR2715502B1 (fr) * | 1994-01-26 | 1996-04-05 | Commissariat Energie Atomique | Structure présentant des cavités et procédé de réalisation d'une telle structure. |
FR2748851B1 (fr) * | 1996-05-15 | 1998-08-07 | Commissariat Energie Atomique | Procede de realisation d'une couche mince de materiau semiconducteur |
US5877070A (en) * | 1997-05-31 | 1999-03-02 | Max-Planck Society | Method for the transfer of thin layers of monocrystalline material to a desirable substrate |
-
1997
- 1997-07-03 DE DE69733471T patent/DE69733471D1/de not_active Expired - Fee Related
- 1997-07-03 EP EP97830335A patent/EP0889505B1/de not_active Expired - Lifetime
-
1998
- 1998-06-29 US US09/106,624 patent/US6303472B1/en not_active Expired - Lifetime
- 1998-07-03 JP JP10188398A patent/JPH1187491A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
EP0889505B1 (de) | 2005-06-08 |
JPH1187491A (ja) | 1999-03-30 |
US6303472B1 (en) | 2001-10-16 |
EP0889505A1 (de) | 1999-01-07 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8339 | Ceased/non-payment of the annual fee |