DE69732637D1 - Selbsttest und Korrektur von Ladungsverlustfehlern in einem Sektorenlöschbaren und-programmierbaren Flashspeicher - Google Patents

Selbsttest und Korrektur von Ladungsverlustfehlern in einem Sektorenlöschbaren und-programmierbaren Flashspeicher

Info

Publication number
DE69732637D1
DE69732637D1 DE69732637T DE69732637T DE69732637D1 DE 69732637 D1 DE69732637 D1 DE 69732637D1 DE 69732637 T DE69732637 T DE 69732637T DE 69732637 T DE69732637 T DE 69732637T DE 69732637 D1 DE69732637 D1 DE 69732637D1
Authority
DE
Germany
Prior art keywords
column
parity
self
test
correction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69732637T
Other languages
English (en)
Other versions
DE69732637T2 (de
Inventor
Paolo Cappelletti
Alfonso Maurelli
Marco Olivo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
Original Assignee
STMicroelectronics SRL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SRL filed Critical STMicroelectronics SRL
Application granted granted Critical
Publication of DE69732637D1 publication Critical patent/DE69732637D1/de
Publication of DE69732637T2 publication Critical patent/DE69732637T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1068Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in sector programmable memories, e.g. flash disk
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/52Protection of memory contents; Detection of errors in memory contents
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1048Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using arrangements adapted for a specific error detection or correction feature
    • G06F11/106Correcting systematically all correctable errors, i.e. scrubbing
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70Masking faults in memories by using spares or by reconfiguring
    • G11C29/76Masking faults in memories by using spares or by reconfiguring using address translation or modifications

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Read Only Memory (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
DE69732637T 1997-12-22 1997-12-22 Selbsttest und Korrektur von Ladungsverlustfehlern in einem Sektorenlöschbaren und-programmierbaren Flashspeicher Expired - Fee Related DE69732637T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP97830693A EP0926687B1 (de) 1997-12-22 1997-12-22 Selbsttest und Korrektur von Ladungsverlustfehlern in einem Sektorenlöschbaren und-programmierbaren Flashspeicher

Publications (2)

Publication Number Publication Date
DE69732637D1 true DE69732637D1 (de) 2005-04-07
DE69732637T2 DE69732637T2 (de) 2005-12-29

Family

ID=8230908

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69732637T Expired - Fee Related DE69732637T2 (de) 1997-12-22 1997-12-22 Selbsttest und Korrektur von Ladungsverlustfehlern in einem Sektorenlöschbaren und-programmierbaren Flashspeicher

Country Status (4)

Country Link
US (1) US6275960B1 (de)
EP (1) EP0926687B1 (de)
JP (1) JPH11260097A (de)
DE (1) DE69732637T2 (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0991081B1 (de) * 1998-09-30 2005-11-30 STMicroelectronics S.r.l. Emulierte EEPROM Speicheranordnung und entsprechendes Verfahren
EP1096379B1 (de) * 1999-11-01 2005-12-07 Koninklijke Philips Electronics N.V. Datenschaltung mit einem nichtflüchtigen Speicher und mit einer fehlerkorrigierenden Schaltung
DE60024564T2 (de) 1999-11-01 2006-08-10 Koninklijke Philips Electronics N.V. Datenschaltung mit einem nicht flüchtigen Speicher und mit einer fehlerkorrigierenden Schaltung
US6813752B1 (en) * 2002-11-26 2004-11-02 Advanced Micro Devices, Inc. Method of determining charge loss activation energy of a memory array
US7321951B2 (en) * 2003-11-17 2008-01-22 Micron Technology, Inc. Method for testing flash memory power loss recovery
KR100643288B1 (ko) * 2004-11-16 2006-11-10 삼성전자주식회사 플래시 메모리의 데이터 처리 장치 및 방법
KR100643287B1 (ko) 2004-11-19 2006-11-10 삼성전자주식회사 플래시 메모리의 데이터 처리 장치 및 방법
DE102006013763A1 (de) * 2006-03-24 2007-09-27 Robert Bosch Gmbh Verfahren zum Betreiben einer Speichereinrichtung
JP4939870B2 (ja) * 2006-08-16 2012-05-30 株式会社東芝 半導体記憶装置およびそのテスト方法
JP2009070509A (ja) * 2007-09-14 2009-04-02 Oki Electric Ind Co Ltd 半導体記憶装置
EP2149841A3 (de) 2008-07-24 2013-12-04 Atmel Automotive GmbH Speichersystem, Leseverstärker, Verwendung und Verfahren zur Fehlerdetektion mittels Parity-Bits eines Blockcodes

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61264599A (ja) * 1985-05-16 1986-11-22 Fujitsu Ltd 半導体記憶装置
US4939694A (en) * 1986-11-03 1990-07-03 Hewlett-Packard Company Defect tolerant self-testing self-repairing memory system
JPH0664918B2 (ja) * 1989-05-25 1994-08-22 ローム株式会社 自己訂正機能を有する半導体記憶装置
JPH05225798A (ja) * 1991-08-14 1993-09-03 Internatl Business Mach Corp <Ibm> メモリシステム
US5532962A (en) * 1992-05-20 1996-07-02 Sandisk Corporation Soft errors handling in EEPROM devices
KR0168896B1 (ko) * 1993-09-20 1999-02-01 세키자와 다다시 패리티에 의해 에러를 수정할 수 있는 반도체 메모리장치
US5475693A (en) * 1994-12-27 1995-12-12 Intel Corporation Error management processes for flash EEPROM memory arrays

Also Published As

Publication number Publication date
EP0926687A1 (de) 1999-06-30
DE69732637T2 (de) 2005-12-29
JPH11260097A (ja) 1999-09-24
EP0926687B1 (de) 2005-03-02
US6275960B1 (en) 2001-08-14

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee