DE69729116D1 - Verfahren und vorrichtung zur kleinleistungsdatenübertragung - Google Patents

Verfahren und vorrichtung zur kleinleistungsdatenübertragung

Info

Publication number
DE69729116D1
DE69729116D1 DE69729116T DE69729116T DE69729116D1 DE 69729116 D1 DE69729116 D1 DE 69729116D1 DE 69729116 T DE69729116 T DE 69729116T DE 69729116 T DE69729116 T DE 69729116T DE 69729116 D1 DE69729116 D1 DE 69729116D1
Authority
DE
Germany
Prior art keywords
power transmission
small power
small
transmission
power
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69729116T
Other languages
English (en)
Other versions
DE69729116T2 (de
Inventor
I Stamoulis
Junji Sugisawa
Y Zhang
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of DE69729116D1 publication Critical patent/DE69729116D1/de
Application granted granted Critical
Publication of DE69729116T2 publication Critical patent/DE69729116T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • H03K17/6871—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors the output circuit comprising more than one controlled field-effect transistor
    • H03K17/6872—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors the output circuit comprising more than one controlled field-effect transistor using complementary field-effect transistors
DE69729116T 1996-12-30 1997-12-18 Verfahren und vorrichtung zur kleinleistungsdatenübertragung Expired - Lifetime DE69729116T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/777,547 US5831453A (en) 1996-12-30 1996-12-30 Method and apparatus for low power data transmission
PCT/US1997/023939 WO1998029951A1 (en) 1996-12-30 1997-12-18 Method and apparatus for low power data transmission

Publications (2)

Publication Number Publication Date
DE69729116D1 true DE69729116D1 (de) 2004-06-17
DE69729116T2 DE69729116T2 (de) 2004-10-21

Family

ID=25110547

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69729116T Expired - Lifetime DE69729116T2 (de) 1996-12-30 1997-12-18 Verfahren und vorrichtung zur kleinleistungsdatenübertragung

Country Status (5)

Country Link
US (1) US5831453A (de)
EP (1) EP0948841B1 (de)
AU (1) AU5807498A (de)
DE (1) DE69729116T2 (de)
WO (1) WO1998029951A1 (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5955911A (en) * 1997-10-06 1999-09-21 Sun Microsystems, Inc. On-chip differential resistance technique with noise immunity and symmetric resistance
US6105106A (en) * 1997-12-31 2000-08-15 Micron Technology, Inc. Computer system, memory device and shift register including a balanced switching circuit with series connected transfer gates which are selectively clocked for fast switching times
JP3592943B2 (ja) * 1999-01-07 2004-11-24 松下電器産業株式会社 半導体集積回路及び半導体集積回路システム
US6127850A (en) * 1999-06-30 2000-10-03 Intel Corporation Low power clock buffer with shared, clocked transistor
US6124737A (en) * 1999-06-30 2000-09-26 Intel Corporation Low power clock buffer having a reduced, clocked, pull-down transistor
US6288593B1 (en) * 2000-01-04 2001-09-11 Translogic Technology, Inc. Digital electronic circuit for use in implementing digital logic functions
US6522172B2 (en) * 2001-03-20 2003-02-18 Micron Technology, Inc. High speed latch/register
US6529044B2 (en) * 2001-07-31 2003-03-04 Compaq Information Technologies Group, L.P. Conditional clock gate that reduces data dependent loading on a clock network

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR860001485B1 (ko) * 1982-09-13 1986-09-26 산요덴기 가부시기가이샤 애널로그스위치회로
JPS5974721A (ja) * 1982-10-21 1984-04-27 Toshiba Corp シユミツト・トリガ回路
JPS6030215A (ja) * 1983-07-28 1985-02-15 Toshiba Corp Ｃｍｏｓ論理回路
US5189319A (en) * 1991-10-10 1993-02-23 Intel Corporation Power reducing buffer/latch circuit
EP0837562B1 (de) * 1991-12-17 2001-07-04 STMicroelectronics, Inc. Ausgangspufferschaltung mit Vorladung
US5517136A (en) * 1995-03-03 1996-05-14 Intel Corporation Opportunistic time-borrowing domino logic

Also Published As

Publication number Publication date
EP0948841A4 (de) 2001-02-07
EP0948841B1 (de) 2004-05-12
EP0948841A1 (de) 1999-10-13
WO1998029951A1 (en) 1998-07-09
DE69729116T2 (de) 2004-10-21
US5831453A (en) 1998-11-03
AU5807498A (en) 1998-07-31

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Representative=s name: HEYER, V., DIPL.-PHYS. DR.RER.NAT., PAT.-ANW., 806