DE69729046T2 - Dynamische Zuteilung von Pufferraum zwischen Anfragen und Antworten - Google Patents

Dynamische Zuteilung von Pufferraum zwischen Anfragen und Antworten Download PDF

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Publication number
DE69729046T2
DE69729046T2 DE69729046T DE69729046T DE69729046T2 DE 69729046 T2 DE69729046 T2 DE 69729046T2 DE 69729046 T DE69729046 T DE 69729046T DE 69729046 T DE69729046 T DE 69729046T DE 69729046 T2 DE69729046 T2 DE 69729046T2
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DE
Germany
Prior art keywords
limit
total
counter
request
answer
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69729046T
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German (de)
English (en)
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DE69729046D1 (de
Inventor
Kenneth Plano Chaney
Michael T. South Ruff
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hewlett Packard Development Co LP
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Hewlett Packard Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by Hewlett Packard Co filed Critical Hewlett Packard Co
Publication of DE69729046D1 publication Critical patent/DE69729046D1/de
Application granted granted Critical
Publication of DE69729046T2 publication Critical patent/DE69729046T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5011—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
    • G06F9/5016—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals the resource being the memory

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Multi Processors (AREA)
DE69729046T 1996-11-12 1997-07-03 Dynamische Zuteilung von Pufferraum zwischen Anfragen und Antworten Expired - Fee Related DE69729046T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US748226 1996-11-12
US08/748,226 US5881316A (en) 1996-11-12 1996-11-12 Dynamic allocation of queue space using counters

Publications (2)

Publication Number Publication Date
DE69729046D1 DE69729046D1 (de) 2004-06-17
DE69729046T2 true DE69729046T2 (de) 2005-04-28

Family

ID=25008540

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69729046T Expired - Fee Related DE69729046T2 (de) 1996-11-12 1997-07-03 Dynamische Zuteilung von Pufferraum zwischen Anfragen und Antworten

Country Status (4)

Country Link
US (1) US5881316A (enExample)
EP (1) EP0841617B1 (enExample)
JP (1) JPH10187635A (enExample)
DE (1) DE69729046T2 (enExample)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6938094B1 (en) 1999-09-17 2005-08-30 Advanced Micro Devices, Inc. Virtual channels and corresponding buffer allocations for deadlock-free computer system operation
US6345345B1 (en) * 1999-01-26 2002-02-05 Advanced Micro Devices, Inc. Data communications device and associated method for arbitrating access using dynamically programmable arbitration scheme and limits on data transfers
US6888843B2 (en) 1999-09-17 2005-05-03 Advanced Micro Devices, Inc. Response virtual channel for handling all responses
US6950438B1 (en) 1999-09-17 2005-09-27 Advanced Micro Devices, Inc. System and method for implementing a separate virtual channel for posted requests in a multiprocessor computer system
US6694388B1 (en) * 2000-05-31 2004-02-17 3Com Corporation Dynamic queuing system incorporating multiple queues sharing a single memory
US6701387B1 (en) * 2000-08-31 2004-03-02 Hewlett-Packard Development Company, L.P. Adaptive data fetch prediction algorithm
US7213098B2 (en) * 2000-11-28 2007-05-01 Sun Microsystems, Inc. Computer system and method providing a memory buffer for use with native and platform-independent software code
US6721826B2 (en) * 2001-09-25 2004-04-13 Lsi Logic Corporation Buffer partitioning for managing multiple data streams
US6715055B1 (en) 2001-10-15 2004-03-30 Advanced Micro Devices, Inc. Apparatus and method for allocating buffer space
US6877048B2 (en) * 2002-03-12 2005-04-05 International Business Machines Corporation Dynamic memory allocation between inbound and outbound buffers in a protocol handler
US7570597B2 (en) * 2003-06-12 2009-08-04 Temic Automotive Of North America, Inc. Discovery process in a vehicle network
US7865684B2 (en) * 2005-06-27 2011-01-04 Ab Initio Technology Llc Managing message queues
US8788465B2 (en) 2010-12-01 2014-07-22 International Business Machines Corporation Notification of configuration updates in a cluster system
US9069571B2 (en) * 2010-12-01 2015-06-30 International Business Machines Corporation Propagation of unique device names in a cluster system
US8943082B2 (en) 2010-12-01 2015-01-27 International Business Machines Corporation Self-assignment of node identifier in a cluster system
US9183148B2 (en) 2013-12-12 2015-11-10 International Business Machines Corporation Efficient distributed cache consistency

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4788679A (en) * 1986-09-02 1988-11-29 Nippon Telegraph And Telephone Corporation Packet switch with variable data transfer rate links
US4922438A (en) * 1986-12-11 1990-05-01 Siemens Aktiengesellschaft Method and apparatus for reading packet-oriented data signals into and out of a buffer
JPH0237422A (ja) * 1988-07-28 1990-02-07 Oki Electric Ind Co Ltd 数値管理方式
JP2842738B2 (ja) * 1992-08-25 1999-01-06 富士通株式会社 オンライン処理システム
US5448701A (en) * 1992-12-22 1995-09-05 International Business Machines Corporation Flow controller for shared bus used by plural resources
US5541932A (en) * 1994-06-13 1996-07-30 Xerox Corporation Circuit for freezing the data in an interface buffer
US5517615A (en) * 1994-08-15 1996-05-14 Unisys Corporation Multi-channel integrity checking data transfer system for controlling different size data block transfers with on-the-fly checkout of each word and data block transferred
US5473604A (en) * 1994-11-21 1995-12-05 At&T Corp. Method for avoiding node overload in a packet switching network
GB2298109B (en) * 1995-02-14 1999-09-01 Nokia Mobile Phones Ltd Data interface

Also Published As

Publication number Publication date
DE69729046D1 (de) 2004-06-17
US5881316A (en) 1999-03-09
EP0841617A3 (en) 2002-01-16
EP0841617A2 (en) 1998-05-13
EP0841617B1 (en) 2004-05-12
JPH10187635A (ja) 1998-07-21

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Legal Events

Date Code Title Description
8327 Change in the person/name/address of the patent owner

Owner name: HEWLETT-PACKARD DEVELOPMENT CO., L.P., HOUSTON, TE

8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee