DE69727427D1 - 8/9 Kodierungsvorrichtung und Verfahren zu deren Betrieb - Google Patents

8/9 Kodierungsvorrichtung und Verfahren zu deren Betrieb

Info

Publication number
DE69727427D1
DE69727427D1 DE69727427T DE69727427T DE69727427D1 DE 69727427 D1 DE69727427 D1 DE 69727427D1 DE 69727427 T DE69727427 T DE 69727427T DE 69727427 T DE69727427 T DE 69727427T DE 69727427 D1 DE69727427 D1 DE 69727427D1
Authority
DE
Germany
Prior art keywords
coding device
coding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69727427T
Other languages
English (en)
Inventor
Hideki Ando
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Application granted granted Critical
Publication of DE69727427D1 publication Critical patent/DE69727427D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/14—Digital recording or reproducing using self-clocking codes
    • G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1423—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code
    • G11B20/1426—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code conversion to or from block codes or representations thereof
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/14—Digital recording or reproducing using self-clocking codes
    • G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1423—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code
    • G11B20/1426—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code conversion to or from block codes or representations thereof
    • G11B2020/1434—8 to 9 modulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
DE69727427T 1996-07-02 1997-07-02 8/9 Kodierungsvorrichtung und Verfahren zu deren Betrieb Expired - Lifetime DE69727427D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17253396 1996-07-02

Publications (1)

Publication Number Publication Date
DE69727427D1 true DE69727427D1 (de) 2004-03-11

Family

ID=15943679

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69727427T Expired - Lifetime DE69727427D1 (de) 1996-07-02 1997-07-02 8/9 Kodierungsvorrichtung und Verfahren zu deren Betrieb

Country Status (3)

Country Link
US (1) US5870040A (de)
EP (1) EP0817192B1 (de)
DE (1) DE69727427D1 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3339336B2 (ja) * 1996-11-30 2002-10-28 日本ビクター株式会社 Ｄｓｖ制御方法及びその装置
US6031472A (en) * 1997-07-23 2000-02-29 And Yet, Inc. Encoding/detection method for digital data transmitter with a signal having multiple levels
JP3348674B2 (ja) * 1999-03-10 2002-11-20 日本電気株式会社 記録符号変換装置及びその記録符号化方式並びにその記録符号化データを記録した記録媒体
US6662338B1 (en) 1999-09-30 2003-12-09 Stmicroelectronics, Inc. Parity- sensitive Viterbi detector and method for recovering information from a read signal
US6492918B1 (en) 1999-09-30 2002-12-10 Stmicroelectronics, Inc. Code word having data bits and code bits and method for encoding data
US6765511B2 (en) * 2002-06-27 2004-07-20 Victor Company Of Japan, Ltd. Method and apparatus for encoding digital data

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4833471A (en) * 1984-03-26 1989-05-23 Canon Kabushiki Kaisha Data processing apparatus
US4775985A (en) * 1987-04-06 1988-10-04 Sony Corporation Method of dc-free 8/9 nrz coding using a unique sync word pattern
EP0310041A3 (de) * 1987-09-28 1990-08-22 Nec Home Electronics, Ltd. 8-Bit zu 9-Bit Codeumsetzungssystem und 8/9-Konverter
JP2870843B2 (ja) * 1989-08-31 1999-03-17 ソニー株式会社 情報伝送装置
JP3038245B2 (ja) * 1991-01-29 2000-05-08 株式会社東芝 ディジタル変調方式
JPH06284015A (ja) * 1993-03-26 1994-10-07 Toshiba Corp ディジタル変調装置

Also Published As

Publication number Publication date
EP0817192A3 (de) 1998-12-09
EP0817192B1 (de) 2004-02-04
US5870040A (en) 1999-02-09
EP0817192A2 (de) 1998-01-07

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Legal Events

Date Code Title Description
8332 No legal effect for de