DE69724575D1 - Integrierte Schaltung - Google Patents
Integrierte SchaltungInfo
- Publication number
- DE69724575D1 DE69724575D1 DE69724575T DE69724575T DE69724575D1 DE 69724575 D1 DE69724575 D1 DE 69724575D1 DE 69724575 T DE69724575 T DE 69724575T DE 69724575 T DE69724575 T DE 69724575T DE 69724575 D1 DE69724575 D1 DE 69724575D1
- Authority
- DE
- Germany
- Prior art keywords
- integrated circuit
- integrated
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
- G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
- G01R31/318572—Input/Output interfaces
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/26—Functional testing
- G06F11/267—Reconfiguring circuits for testing, e.g. LSSD, partitioning
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
- G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
- G01R31/318558—Addressing or selecting of subparts of the device under test
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US3175796P | 1996-11-25 | 1996-11-25 | |
US31757P | 1996-11-25 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69724575D1 true DE69724575D1 (de) | 2003-10-09 |
DE69724575T2 DE69724575T2 (de) | 2004-06-24 |
Family
ID=21861240
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69724575T Expired - Lifetime DE69724575T2 (de) | 1996-11-25 | 1997-11-14 | Integrierte Schaltung |
Country Status (5)
Country | Link |
---|---|
EP (1) | EP0852354B1 (de) |
JP (1) | JPH10177501A (de) |
KR (1) | KR19980042735A (de) |
DE (1) | DE69724575T2 (de) |
TW (1) | TW383490B (de) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE59904852D1 (de) | 1998-05-12 | 2003-05-08 | Infineon Technologies Ag | Integrierte schaltung mit scan-register-kette |
DE19832307C2 (de) * | 1998-07-17 | 2000-09-21 | Siemens Ag | Integrierte Schaltung mit einer Selbsttesteinrichtung |
US6694463B2 (en) | 2001-01-16 | 2004-02-17 | Atmel Corporation | Input/output continuity test mode circuit |
US6635931B1 (en) | 2002-04-02 | 2003-10-21 | Illinois Institute Of Technology | Bonding pad-oriented all-mode ESD protection structure |
US7835158B2 (en) | 2005-12-30 | 2010-11-16 | Micron Technology, Inc. | Connection verification technique |
US8941404B2 (en) * | 2011-11-29 | 2015-01-27 | Infineon Technologies Austria Ag | System and method for testing a power supply controller |
US9653184B2 (en) * | 2014-06-16 | 2017-05-16 | Sandisk Technologies Llc | Non-volatile memory module with physical-to-physical address remapping |
WO2023225225A1 (en) * | 2022-05-20 | 2023-11-23 | Octavo Systems Llc | Reliability testing using functional devices |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5065090A (en) * | 1988-07-13 | 1991-11-12 | Cross-Check Technology, Inc. | Method for testing integrated circuits having a grid-based, "cross-check" te |
US5202624A (en) * | 1990-08-31 | 1993-04-13 | Cross-Check Technology, Inc. | Interface between ic operational circuitry for coupling test signal from internal test matrix |
-
1997
- 1997-11-14 EP EP97119988A patent/EP0852354B1/de not_active Expired - Lifetime
- 1997-11-14 DE DE69724575T patent/DE69724575T2/de not_active Expired - Lifetime
- 1997-11-25 KR KR1019970062835A patent/KR19980042735A/ko not_active Application Discontinuation
- 1997-11-25 JP JP9323645A patent/JPH10177501A/ja active Pending
-
1998
- 1998-02-20 TW TW086117831A patent/TW383490B/zh not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
JPH10177501A (ja) | 1998-06-30 |
TW383490B (en) | 2000-03-01 |
EP0852354B1 (de) | 2003-09-03 |
KR19980042735A (ko) | 1998-08-17 |
DE69724575T2 (de) | 2004-06-24 |
EP0852354A1 (de) | 1998-07-08 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |