DE69719669T2 - Dynamische Peripheriesteuerung von E/A-Puffern in Peripheriegeräten mit modularer Ein-/Ausgabe - Google Patents

Dynamische Peripheriesteuerung von E/A-Puffern in Peripheriegeräten mit modularer Ein-/Ausgabe

Info

Publication number
DE69719669T2
DE69719669T2 DE69719669T DE69719669T DE69719669T2 DE 69719669 T2 DE69719669 T2 DE 69719669T2 DE 69719669 T DE69719669 T DE 69719669T DE 69719669 T DE69719669 T DE 69719669T DE 69719669 T2 DE69719669 T2 DE 69719669T2
Authority
DE
Germany
Prior art keywords
card
peripheral
peripheral device
memory
queue
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69719669T
Other languages
German (de)
English (en)
Other versions
DE69719669D1 (de
Inventor
Patrick W. Fulghum
Thomas S. Gale
Steven J. Jahr
Kevin N. Smith
James G. Wendt
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hewlett Packard Development Co LP
Original Assignee
Hewlett Packard Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hewlett Packard Co filed Critical Hewlett Packard Co
Application granted granted Critical
Publication of DE69719669D1 publication Critical patent/DE69719669D1/de
Publication of DE69719669T2 publication Critical patent/DE69719669T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer And Data Communications (AREA)
  • Communication Control (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Memory System (AREA)
DE69719669T 1996-11-04 1997-04-10 Dynamische Peripheriesteuerung von E/A-Puffern in Peripheriegeräten mit modularer Ein-/Ausgabe Expired - Fee Related DE69719669T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/743,618 US6038621A (en) 1996-11-04 1996-11-04 Dynamic peripheral control of I/O buffers in peripherals with modular I/O

Publications (2)

Publication Number Publication Date
DE69719669D1 DE69719669D1 (de) 2003-04-17
DE69719669T2 true DE69719669T2 (de) 2003-12-18

Family

ID=24989478

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69719669T Expired - Fee Related DE69719669T2 (de) 1996-11-04 1997-04-10 Dynamische Peripheriesteuerung von E/A-Puffern in Peripheriegeräten mit modularer Ein-/Ausgabe

Country Status (4)

Country Link
US (1) US6038621A (https=)
EP (1) EP0840202B1 (https=)
JP (1) JPH10143461A (https=)
DE (1) DE69719669T2 (https=)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3559713B2 (ja) * 1997-10-27 2004-09-02 キヤノン株式会社 印刷処理装置、及び、印刷処理方法、並びに、処理プログラムが格納された記憶媒体
US6519686B2 (en) * 1998-01-05 2003-02-11 Intel Corporation Information streaming in a multi-process system using shared memory
US6321335B1 (en) 1998-10-30 2001-11-20 Acqis Technology, Inc. Password protected modular computer method and device
US6718415B1 (en) * 1999-05-14 2004-04-06 Acqis Technology, Inc. Computer system and method including console housing multiple computer modules having independent processing units, mass storage devices, and graphics controllers
US6643777B1 (en) 1999-05-14 2003-11-04 Acquis Technology, Inc. Data security method and device for computer modules
US6983330B1 (en) * 1999-12-29 2006-01-03 Emc Corporation Method and apparatus for using multiple paths for processing out of band commands
US7228366B2 (en) * 2001-06-29 2007-06-05 Intel Corporation Method and apparatus for deterministic removal and reclamation of work items from an expansion bus schedule
US6654861B2 (en) * 2001-07-18 2003-11-25 Smart Matic Corp. Method to manage multiple communication queues in an 8-bit microcontroller
US7581026B2 (en) * 2001-12-28 2009-08-25 Intel Corporation Communicating transaction types between agents in a computer system using packet headers including format and type fields
US20040006633A1 (en) * 2002-07-03 2004-01-08 Intel Corporation High-speed multi-processor, multi-thread queue implementation
US7089282B2 (en) * 2002-07-31 2006-08-08 International Business Machines Corporation Distributed protocol processing in a data processing system
US7200844B2 (en) * 2002-08-08 2007-04-03 Hewlett-Packard Development Company, Lp. User installation of imaging device control system
US7757232B2 (en) * 2003-08-14 2010-07-13 Hewlett-Packard Development Company, L.P. Method and apparatus for implementing work request lists
US7617376B2 (en) * 2003-08-14 2009-11-10 Hewlett-Packard Development Company, L.P. Method and apparatus for accessing a memory
US8959171B2 (en) 2003-09-18 2015-02-17 Hewlett-Packard Development Company, L.P. Method and apparatus for acknowledging a request for data transfer
US7404190B2 (en) * 2003-09-18 2008-07-22 Hewlett-Packard Development Company, L.P. Method and apparatus for providing notification via multiple completion queue handlers
US8150996B2 (en) * 2003-12-16 2012-04-03 Hewlett-Packard Development Company, L.P. Method and apparatus for handling flow control for a data transfer
WO2007139426A1 (en) * 2006-05-31 2007-12-06 Intel Corporation Multiple phase buffer enlargement for rdma data transfer
US20080147896A1 (en) * 2006-10-10 2008-06-19 Nokia Corporation Method, electronic device, computer program product and circuit assembly for memory allocation
US7990724B2 (en) 2006-12-19 2011-08-02 Juhasz Paul R Mobile motherboard
US8671153B1 (en) 2010-08-20 2014-03-11 Acqis Llc Low cost, high performance and high data throughput server blade
US9965323B2 (en) 2015-03-11 2018-05-08 Western Digital Technologies, Inc. Task queues
US10108518B2 (en) * 2016-04-07 2018-10-23 International Business Machines Corporation Device interference detection and remediation

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4228496A (en) * 1976-09-07 1980-10-14 Tandem Computers Incorporated Multiprocessor system
US4591973A (en) * 1983-06-06 1986-05-27 Sperry Corporation Input/output system and method for digital computers
CA1228677A (en) * 1984-06-21 1987-10-27 Cray Research, Inc. Peripheral interface system
US4688166A (en) * 1984-08-03 1987-08-18 Motorola Computer Systems, Inc. Direct memory access controller supporting multiple input/output controllers and memory units
JPS62208153A (ja) * 1986-03-08 1987-09-12 Nec Corp 入出力バツフア装置
US5220674A (en) * 1987-07-17 1993-06-15 Digital Equipment Corporation Local area print server for requesting and storing required resource data and forwarding printer status message to selected destination
US5008808A (en) * 1988-06-23 1991-04-16 Storage Technology Corporation Consolidation of commands in a buffered input/output device
EP0374764B1 (en) * 1988-12-19 2001-04-04 Nec Corporation Data transfer apparatus
DE68924051T2 (de) * 1988-12-30 1996-05-02 Ibm Vielfacher Ein-/Ausgabe-Kanal.
US5485590A (en) * 1990-01-08 1996-01-16 Allen-Bradley Company, Inc. Programmable controller communication interface module which is configurable by a removable memory cartridge
US5197128A (en) * 1991-03-04 1993-03-23 Hewlett-Packard Company Modular interface
DE4118623C2 (de) * 1991-06-06 1993-12-16 Siemens Ag Verfahren zur Pufferaufteilung in Kommunikationssystemen
JP3031393B2 (ja) * 1992-01-30 2000-04-10 日本電気株式会社 クラス別バッファ面数の動的変更方式
JPH0659835A (ja) * 1992-08-12 1994-03-04 Nec Corp 帳表出力管理方式
JPH07262079A (ja) * 1994-03-16 1995-10-13 Fujitsu Ltd バッファ再割当システム
US5687392A (en) * 1994-05-11 1997-11-11 Microsoft Corporation System for allocating buffer to transfer data when user buffer is mapped to physical region that does not conform to physical addressing limitations of controller
AU2689295A (en) * 1994-06-15 1996-01-05 Intel Corporation Computer system with peripheral control functions integrated into host cpu
US5797042A (en) * 1995-03-16 1998-08-18 Intel Corporation Method and apparatus for adjusting the buffering characteristic in the pipeline of a data transfer system
US5784698A (en) * 1995-12-05 1998-07-21 International Business Machines Corporation Dynamic memory allocation that enalbes efficient use of buffer pool memory segments
US5838994A (en) * 1996-01-11 1998-11-17 Cisco Technology, Inc. Method and apparatus for the dynamic allocation of buffers in a digital communications network
US5907717A (en) * 1996-02-23 1999-05-25 Lsi Logic Corporation Cross-connected memory system for allocating pool buffers in each frame buffer and providing addresses thereof

Also Published As

Publication number Publication date
DE69719669D1 (de) 2003-04-17
US6038621A (en) 2000-03-14
EP0840202B1 (en) 2003-03-12
EP0840202A1 (en) 1998-05-06
JPH10143461A (ja) 1998-05-29

Similar Documents

Publication Publication Date Title
DE69719669T2 (de) Dynamische Peripheriesteuerung von E/A-Puffern in Peripheriegeräten mit modularer Ein-/Ausgabe
DE3850881T2 (de) Verfahren und Vorrichtung zur Nachrichtenübertragung zwischen Quellen- und Zielanwender durch einen anteilig genutzten Speicher.
DE69225463T2 (de) Verfahren und Gerät zur Verschachtelung von mehrkanaligen DMA-Operationen
DE68927375T2 (de) Arbitrierung von Übertragungsanforderungen in einem Multiprozessor-Rechnersystem
DE69818141T2 (de) Verfahren und Vorrichtung zur dynamischen Verwaltung von Kommunikationspuffern mit Paketvermittlungsdaten für einen Drucker
DE69906604T2 (de) Rechnersystem und Verfahren zur Zuordnung von Speicherraum zu Kommunikationsportpuffern
DE69230954T2 (de) Modulare Schnittstelle und Verfahren hierfür
DE69322221T2 (de) Personalcomputer mit programmierbaren Schwellwert-Fiforegistern zur Datenübertragung
DE60037065T2 (de) Übertragungsteuerung mit Naben- und Torachitektur
DE69221986T2 (de) Vorrichtung zur Verringerung von Unterbrechungswiederholungsversuchen
DE602004012106T2 (de) Multikanal-DMA mit gemeinsamem FIFO-Puffer
DE69519117T2 (de) Ein Rechnersystem
DE69024078T2 (de) Mehrprozessoranordnung mit Vervielfältigung von globalen Daten und mit zwei Stufen von Adressübersetzungseinheiten
DE1524166B1 (de) Schaltungsanordnung zur Herstellung von Verbindungen zwischen mehreren unabhaengigen Teilen und einem gemeinsamen Teil einer Datenverarbeitungsanlage
DE69224279T2 (de) Verfahren und Gerät zur Arbitrierung auf Basis der Verfügbarkeit von Betriebsmitteln
DE69935953T2 (de) Drucker und Druckverfahren
DE3500452A1 (de) Prozessoranlage mit einigen stationen, die durch ein kommunikationsnetz mineinander verbunden sind, und station fuer verwendung in einer derartigen prozessoranlage
DE2523372B2 (de) Eingabe-ZAusgabe-Anschlußsteuereinrichtung
CH656728A5 (de) Schnittstellenschaltungsanordnung zur verbindung eines prozessors mit einem nachrichtenkanal.
DE69631720T2 (de) Verfahren und Vorrichtung zum Drucken von Mehrfachkopien
DE4121446A1 (de) Terminal-server-architektur
DE3751487T2 (de) Verfahren zur Steuerung eines Datenübertragungspuffers.
DE69119149T2 (de) Struktur zur direkten Speicher-zu-Speicher-Übertragung
DE3338329C2 (https=)
DE60308832T2 (de) Gemeinsame warteschlange für mehrere eingangströme

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: HEWLETT-PACKARD DEVELOPMENT CO., L.P., HOUSTON, TE

8339 Ceased/non-payment of the annual fee