DE69719669D1 - Dynamische Peripheriesteuerung von E/A-Puffern in Peripheriegeräten mit modularer Ein-/Ausgabe - Google Patents

Dynamische Peripheriesteuerung von E/A-Puffern in Peripheriegeräten mit modularer Ein-/Ausgabe

Info

Publication number
DE69719669D1
DE69719669D1 DE69719669T DE69719669T DE69719669D1 DE 69719669 D1 DE69719669 D1 DE 69719669D1 DE 69719669 T DE69719669 T DE 69719669T DE 69719669 T DE69719669 T DE 69719669T DE 69719669 D1 DE69719669 D1 DE 69719669D1
Authority
DE
Germany
Prior art keywords
buffers
output
dynamic
modular input
peripheral control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69719669T
Other languages
English (en)
Other versions
DE69719669T2 (de
Inventor
Thomas S Gale
Patrick W Fulghum
Kevin N Smith
Steven J Jahr
James G Wendt
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hewlett Packard Development Co LP
Original Assignee
Hewlett Packard Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hewlett Packard Co filed Critical Hewlett Packard Co
Application granted granted Critical
Publication of DE69719669D1 publication Critical patent/DE69719669D1/de
Publication of DE69719669T2 publication Critical patent/DE69719669T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System (AREA)
  • Communication Control (AREA)
  • Computer And Data Communications (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
DE69719669T 1996-11-04 1997-04-10 Dynamische Peripheriesteuerung von E/A-Puffern in Peripheriegeräten mit modularer Ein-/Ausgabe Expired - Fee Related DE69719669T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/743,618 US6038621A (en) 1996-11-04 1996-11-04 Dynamic peripheral control of I/O buffers in peripherals with modular I/O

Publications (2)

Publication Number Publication Date
DE69719669D1 true DE69719669D1 (de) 2003-04-17
DE69719669T2 DE69719669T2 (de) 2003-12-18

Family

ID=24989478

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69719669T Expired - Fee Related DE69719669T2 (de) 1996-11-04 1997-04-10 Dynamische Peripheriesteuerung von E/A-Puffern in Peripheriegeräten mit modularer Ein-/Ausgabe

Country Status (4)

Country Link
US (1) US6038621A (de)
EP (1) EP0840202B1 (de)
JP (1) JPH10143461A (de)
DE (1) DE69719669T2 (de)

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US6519686B2 (en) * 1998-01-05 2003-02-11 Intel Corporation Information streaming in a multi-process system using shared memory
US6321335B1 (en) 1998-10-30 2001-11-20 Acqis Technology, Inc. Password protected modular computer method and device
US6718415B1 (en) * 1999-05-14 2004-04-06 Acqis Technology, Inc. Computer system and method including console housing multiple computer modules having independent processing units, mass storage devices, and graphics controllers
US6643777B1 (en) 1999-05-14 2003-11-04 Acquis Technology, Inc. Data security method and device for computer modules
US6983330B1 (en) * 1999-12-29 2006-01-03 Emc Corporation Method and apparatus for using multiple paths for processing out of band commands
US7228366B2 (en) * 2001-06-29 2007-06-05 Intel Corporation Method and apparatus for deterministic removal and reclamation of work items from an expansion bus schedule
US6654861B2 (en) * 2001-07-18 2003-11-25 Smart Matic Corp. Method to manage multiple communication queues in an 8-bit microcontroller
US7581026B2 (en) * 2001-12-28 2009-08-25 Intel Corporation Communicating transaction types between agents in a computer system using packet headers including format and type fields
US20040006633A1 (en) * 2002-07-03 2004-01-08 Intel Corporation High-speed multi-processor, multi-thread queue implementation
US7089282B2 (en) * 2002-07-31 2006-08-08 International Business Machines Corporation Distributed protocol processing in a data processing system
US7200844B2 (en) * 2002-08-08 2007-04-03 Hewlett-Packard Development Company, Lp. User installation of imaging device control system
US7617376B2 (en) * 2003-08-14 2009-11-10 Hewlett-Packard Development Company, L.P. Method and apparatus for accessing a memory
US7757232B2 (en) * 2003-08-14 2010-07-13 Hewlett-Packard Development Company, L.P. Method and apparatus for implementing work request lists
US8959171B2 (en) 2003-09-18 2015-02-17 Hewlett-Packard Development Company, L.P. Method and apparatus for acknowledging a request for data transfer
US7404190B2 (en) * 2003-09-18 2008-07-22 Hewlett-Packard Development Company, L.P. Method and apparatus for providing notification via multiple completion queue handlers
US8150996B2 (en) * 2003-12-16 2012-04-03 Hewlett-Packard Development Company, L.P. Method and apparatus for handling flow control for a data transfer
WO2007139426A1 (en) * 2006-05-31 2007-12-06 Intel Corporation Multiple phase buffer enlargement for rdma data transfer
US20080147896A1 (en) * 2006-10-10 2008-06-19 Nokia Corporation Method, electronic device, computer program product and circuit assembly for memory allocation
US7990724B2 (en) 2006-12-19 2011-08-02 Juhasz Paul R Mobile motherboard
US8671153B1 (en) 2010-08-20 2014-03-11 Acqis Llc Low cost, high performance and high data throughput server blade
US10073714B2 (en) 2015-03-11 2018-09-11 Western Digital Technologies, Inc. Task queues
US10108518B2 (en) * 2016-04-07 2018-10-23 International Business Machines Corporation Device interference detection and remediation

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Also Published As

Publication number Publication date
EP0840202B1 (de) 2003-03-12
DE69719669T2 (de) 2003-12-18
EP0840202A1 (de) 1998-05-06
JPH10143461A (ja) 1998-05-29
US6038621A (en) 2000-03-14

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: HEWLETT-PACKARD DEVELOPMENT CO., L.P., HOUSTON, TE

8339 Ceased/non-payment of the annual fee