DE69708752D1 - Datenverriegler für Hochgeschwindigkeitsperipherie - Google Patents

Datenverriegler für Hochgeschwindigkeitsperipherie

Info

Publication number
DE69708752D1
DE69708752D1 DE69708752T DE69708752T DE69708752D1 DE 69708752 D1 DE69708752 D1 DE 69708752D1 DE 69708752 T DE69708752 T DE 69708752T DE 69708752 T DE69708752 T DE 69708752T DE 69708752 D1 DE69708752 D1 DE 69708752D1
Authority
DE
Germany
Prior art keywords
speed peripherals
data locker
locker
peripherals
speed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69708752T
Other languages
English (en)
Other versions
DE69708752T2 (de
Inventor
Toshihide Nagatome
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Publication of DE69708752D1 publication Critical patent/DE69708752D1/de
Application granted granted Critical
Publication of DE69708752T2 publication Critical patent/DE69708752T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4208—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a system bus, e.g. VME bus, Futurebus, Multibus
    • G06F13/4213—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a system bus, e.g. VME bus, Futurebus, Multibus with asynchronous protocol

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Microcomputers (AREA)
  • Memory System (AREA)
  • Static Random-Access Memory (AREA)
DE69708752T 1996-05-24 1997-04-23 Datenverriegler für Hochgeschwindigkeitsperipherie Expired - Fee Related DE69708752T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8130267A JPH09311812A (ja) 1996-05-24 1996-05-24 マイクロコンピュータ

Publications (2)

Publication Number Publication Date
DE69708752D1 true DE69708752D1 (de) 2002-01-17
DE69708752T2 DE69708752T2 (de) 2002-08-08

Family

ID=15030207

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69708752T Expired - Fee Related DE69708752T2 (de) 1996-05-24 1997-04-23 Datenverriegler für Hochgeschwindigkeitsperipherie

Country Status (7)

Country Link
US (1) US6098164A (de)
EP (1) EP0809189B1 (de)
JP (1) JPH09311812A (de)
KR (1) KR100336152B1 (de)
CN (1) CN1145106C (de)
DE (1) DE69708752T2 (de)
TW (1) TW425527B (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1295627C (zh) * 2002-01-29 2007-01-17 中兴通讯股份有限公司 一种基于并行总线的模块地址单元
US6728150B2 (en) * 2002-02-11 2004-04-27 Micron Technology, Inc. Method and apparatus for supplementary command bus
CN101118522B (zh) * 2006-08-04 2010-08-25 欧姆龙株式会社 微型计算机装置
JP5888387B1 (ja) * 2014-10-22 2016-03-22 ミツミ電機株式会社 電池保護回路及び電池保護装置、並びに電池パック

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3974479A (en) * 1973-05-01 1976-08-10 Digital Equipment Corporation Memory for use in a computer system in which memories have diverse retrieval characteristics
US4106090A (en) * 1977-01-17 1978-08-08 Fairchild Camera And Instrument Corporation Monolithic microcomputer central processor
US4694391A (en) * 1980-11-24 1987-09-15 Texas Instruments Incorporated Compressed control decoder for microprocessor system
US4509120A (en) * 1982-09-30 1985-04-02 Bell Telephone Laboratories, Inc. Variable cycle-time microcomputer
US4870562A (en) * 1986-03-20 1989-09-26 Nec Corporation Microcomputer capable of accessing internal memory at a desired variable access time
JP2752076B2 (ja) * 1988-02-23 1998-05-18 株式会社東芝 プログラマブル・コントローラ
US5218693A (en) * 1988-07-29 1993-06-08 Hitachi, Ltd. Timer unit and data processing apparatus including the same
JPH04192047A (ja) * 1990-11-27 1992-07-10 Toshiba Corp パーソナルコンピュータ
US5469547A (en) * 1992-07-17 1995-11-21 Digital Equipment Corporation Asynchronous bus interface for generating individual handshake signal for each data transfer based on associated propagation delay within a transaction
US5463753A (en) * 1992-10-02 1995-10-31 Compaq Computer Corp. Method and apparatus for reducing non-snoop window of a cache controller by delaying host bus grant signal to the cache controller
JP3608804B2 (ja) * 1993-05-14 2005-01-12 株式会社ソニー・コンピュータエンタテインメント バス制御装置
JPH07210537A (ja) * 1993-12-10 1995-08-11 Advanced Micro Devicds Inc コンピュータシステム
EP0692764B1 (de) * 1994-06-17 2000-08-09 Advanced Micro Devices, Inc. Speicherübertragungsgeschwindigkeitsbegrenzung für PCI-Meister

Also Published As

Publication number Publication date
TW425527B (en) 2001-03-11
EP0809189A2 (de) 1997-11-26
EP0809189A3 (de) 1998-04-08
KR100336152B1 (ko) 2002-07-18
EP0809189B1 (de) 2001-12-05
JPH09311812A (ja) 1997-12-02
CN1145106C (zh) 2004-04-07
US6098164A (en) 2000-08-01
KR970076252A (ko) 1997-12-12
CN1167947A (zh) 1997-12-17
DE69708752T2 (de) 2002-08-08

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Representative=s name: KIRSCHNER, K., DIPL.-PHYS., PAT.-ANW., 81479 MUENC

8339 Ceased/non-payment of the annual fee