DE69513207D1 - Halbleitervorrichtung - Google Patents
HalbleitervorrichtungInfo
- Publication number
- DE69513207D1 DE69513207D1 DE69513207T DE69513207T DE69513207D1 DE 69513207 D1 DE69513207 D1 DE 69513207D1 DE 69513207 T DE69513207 T DE 69513207T DE 69513207 T DE69513207 T DE 69513207T DE 69513207 D1 DE69513207 D1 DE 69513207D1
- Authority
- DE
- Germany
- Prior art keywords
- semiconductor device
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
- H01L27/105—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
- H01L23/5252—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising anti-fuses, i.e. connections having their state changed from non-conductive to conductive
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
BE9400108A BE1008052A3 (nl) | 1994-01-31 | 1994-01-31 | Halfgeleiderinrichting. |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69513207D1 true DE69513207D1 (de) | 1999-12-16 |
DE69513207T2 DE69513207T2 (de) | 2000-05-11 |
Family
ID=3887929
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69513207T Expired - Fee Related DE69513207T2 (de) | 1994-01-31 | 1995-01-24 | Halbleitervorrichtung |
Country Status (6)
Country | Link |
---|---|
US (1) | US5550773A (de) |
EP (1) | EP0665593B1 (de) |
JP (1) | JPH07226490A (de) |
KR (1) | KR950034803A (de) |
BE (1) | BE1008052A3 (de) |
DE (1) | DE69513207T2 (de) |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3015822B2 (ja) * | 1998-03-06 | 2000-03-06 | 工業技術院長 | 固体選択成長用マスク及びその製造方法 |
US6022770A (en) * | 1998-03-24 | 2000-02-08 | International Business Machines Corporation | NVRAM utilizing high voltage TFT device and method for making the same |
US6777757B2 (en) | 2002-04-26 | 2004-08-17 | Kilopass Technologies, Inc. | High density semiconductor memory cell and memory array using a single transistor |
US20050035429A1 (en) * | 2003-08-15 | 2005-02-17 | Yeh Chih Chieh | Programmable eraseless memory |
US7132350B2 (en) * | 2003-07-21 | 2006-11-07 | Macronix International Co., Ltd. | Method for manufacturing a programmable eraseless memory |
JP5015420B2 (ja) * | 2003-08-15 | 2012-08-29 | 旺宏電子股▲ふん▼有限公司 | プログラマブル消去不要メモリに対するプログラミング方法 |
US8735297B2 (en) | 2004-05-06 | 2014-05-27 | Sidense Corporation | Reverse optical proximity correction method |
JP4981661B2 (ja) * | 2004-05-06 | 2012-07-25 | サイデンス コーポレーション | 分割チャネルアンチヒューズアレイ構造 |
US7755162B2 (en) * | 2004-05-06 | 2010-07-13 | Sidense Corp. | Anti-fuse memory cell |
US9123572B2 (en) | 2004-05-06 | 2015-09-01 | Sidense Corporation | Anti-fuse memory cell |
US7203111B2 (en) * | 2005-02-08 | 2007-04-10 | Hewlett-Packard Development Company, L.P. | Method and apparatus for driver circuit in a MEMS device |
US20060268593A1 (en) * | 2005-05-25 | 2006-11-30 | Spansion Llc | Read-only memory array with dielectric breakdown programmability |
US10037801B2 (en) | 2013-12-06 | 2018-07-31 | Hefei Reliance Memory Limited | 2T-1R architecture for resistive RAM |
JP2016009738A (ja) | 2014-06-24 | 2016-01-18 | 株式会社東芝 | 半導体記憶装置の製造方法 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5626467A (en) * | 1979-08-10 | 1981-03-14 | Toshiba Corp | Semiconductor device and the manufacturing process |
JPS56104387A (en) * | 1980-01-22 | 1981-08-20 | Citizen Watch Co Ltd | Display unit |
US4653026A (en) * | 1981-08-12 | 1987-03-24 | Hitachi, Ltd. | Nonvolatile memory device or a single crystal silicon film |
US4899205A (en) * | 1986-05-09 | 1990-02-06 | Actel Corporation | Electrically-programmable low-impedance anti-fuse element |
US4881114A (en) * | 1986-05-16 | 1989-11-14 | Actel Corporation | Selectively formable vertical diode circuit element |
US5060034A (en) * | 1988-11-01 | 1991-10-22 | Casio Computer Co., Ltd. | Memory device using thin film transistors having an insulation film with si/n composition ratio of 0.85 to 1.1 |
JP2529885B2 (ja) * | 1989-03-10 | 1996-09-04 | 工業技術院長 | 半導体メモリ及びその動作方法 |
GB2238683A (en) * | 1989-11-29 | 1991-06-05 | Philips Electronic Associated | A thin film transistor circuit |
JP3109537B2 (ja) * | 1991-07-12 | 2000-11-20 | 日本電気株式会社 | 読み出し専用半導体記憶装置 |
EP0599388B1 (de) * | 1992-11-20 | 2000-08-02 | Koninklijke Philips Electronics N.V. | Halbleitervorrichtung mit einem programmierbaren Element |
-
1994
- 1994-01-31 BE BE9400108A patent/BE1008052A3/nl active
-
1995
- 1995-01-24 EP EP95200157A patent/EP0665593B1/de not_active Expired - Lifetime
- 1995-01-24 DE DE69513207T patent/DE69513207T2/de not_active Expired - Fee Related
- 1995-01-28 KR KR1019950001722A patent/KR950034803A/ko active IP Right Grant
- 1995-01-30 JP JP7012397A patent/JPH07226490A/ja active Pending
- 1995-01-30 US US08/380,536 patent/US5550773A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
DE69513207T2 (de) | 2000-05-11 |
EP0665593B1 (de) | 1999-11-10 |
JPH07226490A (ja) | 1995-08-22 |
EP0665593A1 (de) | 1995-08-02 |
BE1008052A3 (nl) | 1996-01-03 |
KR950034803A (ko) | 1995-12-28 |
US5550773A (en) | 1996-08-27 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |