DE69427435D1 - Bildspeicher - Google Patents

Bildspeicher

Info

Publication number
DE69427435D1
DE69427435D1 DE69427435T DE69427435T DE69427435D1 DE 69427435 D1 DE69427435 D1 DE 69427435D1 DE 69427435 T DE69427435 T DE 69427435T DE 69427435 T DE69427435 T DE 69427435T DE 69427435 D1 DE69427435 D1 DE 69427435D1
Authority
DE
Germany
Prior art keywords
image storage
image
storage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69427435T
Other languages
English (en)
Other versions
DE69427435T2 (de
Inventor
Haruki Toda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE69427435D1 publication Critical patent/DE69427435D1/de
Publication of DE69427435T2 publication Critical patent/DE69427435T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1075—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for multiport memories each having random access ports and serial ports, e.g. video RAM
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
    • G11C5/025—Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/18—Bit line organisation; Bit line lay-out

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Dram (AREA)
  • Memory System (AREA)
DE69427435T 1993-07-21 1994-07-21 Bildspeicher Expired - Fee Related DE69427435T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5180440A JPH0736778A (ja) 1993-07-21 1993-07-21 画像メモリ

Publications (2)

Publication Number Publication Date
DE69427435D1 true DE69427435D1 (de) 2001-07-19
DE69427435T2 DE69427435T2 (de) 2002-05-23

Family

ID=16083277

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69427435T Expired - Fee Related DE69427435T2 (de) 1993-07-21 1994-07-21 Bildspeicher

Country Status (5)

Country Link
US (1) US5687351A (de)
EP (1) EP0635839B1 (de)
JP (1) JPH0736778A (de)
KR (1) KR0143042B1 (de)
DE (1) DE69427435T2 (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3435205B2 (ja) * 1994-03-16 2003-08-11 株式会社東芝 半導体記憶装置
TW330265B (en) * 1994-11-22 1998-04-21 Hitachi Ltd Semiconductor apparatus
TW340225B (en) * 1996-08-09 1998-09-11 Townsend & Townsend & Crew Llp HIgh-speed video frame buffer
EP0834881A1 (de) * 1996-10-01 1998-04-08 STMicroelectronics S.r.l. Mehrfachblock-Speicher

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR960001106B1 (ko) * 1986-12-17 1996-01-18 가부시기가이샤 히다찌세이사꾸쇼 반도체 메모리
JP3028963B2 (ja) * 1988-09-21 2000-04-04 株式会社東芝 ビデオメモリ装置
JPH02246087A (ja) * 1989-03-20 1990-10-01 Hitachi Ltd 半導体記憶装置ならびにその冗長方式及びレイアウト方式
KR950003605B1 (ko) * 1990-04-27 1995-04-14 가부시키가이샤 도시바 반도체 기억장치
JPH05225774A (ja) * 1992-02-13 1993-09-03 Mitsubishi Electric Corp マルチポート半導体記憶装置
US5265050A (en) * 1992-08-18 1993-11-23 Micron Technology, Inc. Integrated circuit memory with isolation of column line portions through P-sense amplification period
JP2500740B2 (ja) * 1993-04-06 1996-05-29 日本電気株式会社 デュアルポ―トメモリ

Also Published As

Publication number Publication date
KR0143042B1 (ko) 1998-08-17
DE69427435T2 (de) 2002-05-23
EP0635839B1 (de) 2001-06-13
KR950004552A (ko) 1995-02-18
US5687351A (en) 1997-11-11
EP0635839A3 (de) 1996-01-31
JPH0736778A (ja) 1995-02-07
EP0635839A2 (de) 1995-01-25

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee