DE69425363D1 - Signalverarbeitungsapparat mit PLL-Schaltungen - Google Patents

Signalverarbeitungsapparat mit PLL-Schaltungen

Info

Publication number
DE69425363D1
DE69425363D1 DE69425363T DE69425363T DE69425363D1 DE 69425363 D1 DE69425363 D1 DE 69425363D1 DE 69425363 T DE69425363 T DE 69425363T DE 69425363 T DE69425363 T DE 69425363T DE 69425363 D1 DE69425363 D1 DE 69425363D1
Authority
DE
Germany
Prior art keywords
processing apparatus
signal processing
pll circuits
pll
circuits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69425363T
Other languages
English (en)
Other versions
DE69425363T2 (de
Inventor
Masaya Tamamura
Shinichi Shiotsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Semiconductor Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE69425363D1 publication Critical patent/DE69425363D1/de
Publication of DE69425363T2 publication Critical patent/DE69425363T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/0805Details of the phase-locked loop the loop being adapted to provide an additional control signal for use outside the loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/023Generators characterised by the type of circuit or by the means used for producing pulses by the use of differential amplifiers or comparators, with internal or external positive feedback
    • H03K3/0231Astable circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/07Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop using several loops, e.g. for redundant clock signal generation
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/099Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H03L7/0995Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator comprising a ring oscillator

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
DE69425363T 1993-12-24 1994-08-30 Signalverarbeitungsapparat mit PLL-Schaltungen Expired - Lifetime DE69425363T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP32888193A JP3133885B2 (ja) 1993-12-24 1993-12-24 Pll回路を有する信号処理装置

Publications (2)

Publication Number Publication Date
DE69425363D1 true DE69425363D1 (de) 2000-08-31
DE69425363T2 DE69425363T2 (de) 2000-12-07

Family

ID=18215144

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69425363T Expired - Lifetime DE69425363T2 (de) 1993-12-24 1994-08-30 Signalverarbeitungsapparat mit PLL-Schaltungen

Country Status (6)

Country Link
US (1) US5666387A (de)
EP (1) EP0663744B1 (de)
JP (1) JP3133885B2 (de)
KR (1) KR0157095B1 (de)
CA (1) CA2131104C (de)
DE (1) DE69425363T2 (de)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3291198B2 (ja) * 1996-05-08 2002-06-10 富士通株式会社 半導体集積回路
US6067335A (en) * 1996-08-02 2000-05-23 Silicon Systems, Inc. Read channel IC for dual PLL solution
TW397259U (en) * 1997-04-19 2000-07-01 United Microelectronics Corp The filter circuit
EP0892499B1 (de) * 1997-07-14 2000-09-27 STMicroelectronics S.r.l. Integrierte Schaltung mit zwei Phasenregelkreisen und Mitteln zur Verhinderung von Injektionssynchronisierung
JP3094971B2 (ja) 1997-10-08 2000-10-03 日本電気株式会社 位相比較回路並びにこれを用いた位相同期ループ回路及びシリアル―パラレル変換回路
AU1375100A (en) * 1998-11-24 2000-06-13 Giga A/S A method and a circuit for retiming a digital data signal
WO2000031914A2 (en) * 1998-11-24 2000-06-02 Giga A/S A method and a circuit for recovering a digital data signal and a clock from a received data signal
JP3974618B2 (ja) * 2002-11-01 2007-09-12 富士通株式会社 データ処理回路
US20040091064A1 (en) * 2002-11-12 2004-05-13 Broadcom Corporation Phase detector with delay elements for improved data regeneration
EP1524772B1 (de) * 2003-10-13 2008-03-19 STMicroelectronics S.r.l. Verfahren und System zur Phasenrückgewinnung und Dekodierung
JP4534474B2 (ja) * 2003-12-15 2010-09-01 パナソニック電工株式会社 放電灯点灯装置および光伝送システム
US7864911B2 (en) * 2006-09-13 2011-01-04 Sony Corporation System and method for implementing a phase detector to support a data transmission procedure
TWI362834B (en) * 2008-05-26 2012-04-21 Novatek Microelectronics Corp Differential transmitter and auto-adjustment method of data strobe thereof
JP5332328B2 (ja) * 2008-06-11 2013-11-06 富士通株式会社 クロック及びデータ復元回路
JP5694806B2 (ja) * 2011-02-24 2015-04-01 株式会社日立製作所 制御装置及び列車制御装置、並びに列車制御システム
US9077349B2 (en) 2012-02-21 2015-07-07 Qualcomm Incorporated Automatic detection and compensation of frequency offset in point-to-point communication
US9014323B2 (en) * 2013-08-30 2015-04-21 Nxp B.V. Clock synchronizer for aligning remote devices
US9915968B2 (en) * 2016-04-19 2018-03-13 Qualcomm Incorporated Systems and methods for adaptive clock design
TWI829380B (zh) * 2022-10-06 2024-01-11 恆景科技股份有限公司 串列化系統及時脈產生電路

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2051511A (en) * 1979-06-18 1981-01-14 Ibm Stabilized oscillators
JPS5741078A (en) * 1980-08-22 1982-03-06 Seiko Epson Corp Synchronizing circuit of matrix television
US4633193A (en) * 1985-12-02 1986-12-30 At&T Bell Laboratories Clock circuit synchronizer using a frequency synthesizer controlled by a frequency estimator
US5072195A (en) * 1990-04-05 1991-12-10 Gazelle Microcircuits, Inc. Phase-locked loop with clamped voltage-controlled oscillator
DE4011241B4 (de) * 1990-04-06 2005-06-02 Micronas Gmbh Digitale Fernsehsignalverarbeitungsschaltung mit orthogonalem Ausgangstakt
EP0458282B1 (de) * 1990-05-23 1993-11-24 Nec Corporation Phasenregelschleife die mit hoher Geschwindigkeit arbeitet
US5319680A (en) * 1991-09-03 1994-06-07 The Whitaker Corporation Phase locked loop synchronization system for use in data communications

Also Published As

Publication number Publication date
KR950022152A (ko) 1995-07-28
DE69425363T2 (de) 2000-12-07
KR0157095B1 (ko) 1999-02-18
CA2131104C (en) 1999-02-23
EP0663744B1 (de) 2000-07-26
EP0663744A1 (de) 1995-07-19
CA2131104A1 (en) 1995-06-25
US5666387A (en) 1997-09-09
JPH07183803A (ja) 1995-07-21
JP3133885B2 (ja) 2001-02-13

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: FUJITSU MICROELECTRONICS LTD., TOKYO, JP

8327 Change in the person/name/address of the patent owner

Owner name: FUJITSU SEMICONDUCTOR LTD., YOKOHAMA, KANAGAWA, JP

8328 Change in the person/name/address of the agent

Representative=s name: SEEGER SEEGER LINDNER PARTNERSCHAFT PATENTANWAELTE