DE69418146D1 - Temporärer Registersatz für einen superpipeline-superskalaren Prozessor - Google Patents

Temporärer Registersatz für einen superpipeline-superskalaren Prozessor

Info

Publication number
DE69418146D1
DE69418146D1 DE69418146T DE69418146T DE69418146D1 DE 69418146 D1 DE69418146 D1 DE 69418146D1 DE 69418146 T DE69418146 T DE 69418146T DE 69418146 T DE69418146 T DE 69418146T DE 69418146 D1 DE69418146 D1 DE 69418146D1
Authority
DE
Germany
Prior art keywords
register set
temporary register
superscalar processor
super pipeline
pipeline superscalar
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69418146T
Other languages
English (en)
Other versions
DE69418146T2 (de
Inventor
Robert Yung
William N Joy
Marc Tremblay
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sun Microsystems Inc
Original Assignee
Sun Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sun Microsystems Inc filed Critical Sun Microsystems Inc
Publication of DE69418146D1 publication Critical patent/DE69418146D1/de
Application granted granted Critical
Publication of DE69418146T2 publication Critical patent/DE69418146T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/3826—Bypassing or forwarding of data results, e.g. locally between pipeline stages or within a pipeline stage
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30105—Register structure
    • G06F9/30116—Shadow registers, e.g. coupled registers, not forming part of the register space
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/3012—Organisation of register space, e.g. banked or distributed register file
    • G06F9/30138—Extension of register space, e.g. register cache
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3838—Dependency mechanisms, e.g. register scoreboarding
    • G06F9/384—Register renaming
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
    • G06F9/3856—Reordering of instructions, e.g. using queues or age tags
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
    • G06F9/3858—Result writeback, i.e. updating the architectural state or memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
    • G06F9/3873—Variable length pipelines, e.g. elastic pipeline
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
    • G06F9/3875—Pipelining a single stage, e.g. superpipelining

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)
DE69418146T 1993-11-17 1994-10-19 Temporärer Registersatz für einen superpipeline-superskalaren Prozessor Expired - Lifetime DE69418146T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/153,814 US6128721A (en) 1993-11-17 1993-11-17 Temporary pipeline register file for a superpipelined superscalar processor

Publications (2)

Publication Number Publication Date
DE69418146D1 true DE69418146D1 (de) 1999-06-02
DE69418146T2 DE69418146T2 (de) 1999-11-25

Family

ID=22548847

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69418146T Expired - Lifetime DE69418146T2 (de) 1993-11-17 1994-10-19 Temporärer Registersatz für einen superpipeline-superskalaren Prozessor

Country Status (5)

Country Link
US (1) US6128721A (de)
EP (1) EP0653703B1 (de)
JP (1) JPH07191846A (de)
KR (1) KR100346515B1 (de)
DE (1) DE69418146T2 (de)

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US7301541B2 (en) 1995-08-16 2007-11-27 Microunity Systems Engineering, Inc. Programmable processor and method with wide operations
US5742840A (en) 1995-08-16 1998-04-21 Microunity Systems Engineering, Inc. General purpose, multiple precision parallel operation, programmable media processor
US6643765B1 (en) 1995-08-16 2003-11-04 Microunity Systems Engineering, Inc. Programmable processor with group floating point operations
CN1100291C (zh) * 1997-08-20 2003-01-29 松下电器产业株式会社 数据处理装置
WO2000008555A1 (en) * 1998-08-06 2000-02-17 Koninklijke Philips Electronics N.V. Data processing device
EP1004959B1 (de) 1998-10-06 2018-08-08 Texas Instruments Incorporated Prozessor mit Pipelineschutz
US6615338B1 (en) 1998-12-03 2003-09-02 Sun Microsystems, Inc. Clustered architecture in a VLIW processor
EP1050800A1 (de) * 1999-05-03 2000-11-08 STMicroelectronics SA Pipelineausführungseinheit
US6704854B1 (en) * 1999-10-25 2004-03-09 Advanced Micro Devices, Inc. Determination of execution resource allocation based on concurrently executable misaligned memory operations
US6553483B1 (en) * 1999-11-29 2003-04-22 Intel Corporation Enhanced virtual renaming scheme and deadlock prevention therefor
WO2001095101A2 (en) * 2000-06-02 2001-12-13 Sun Microsystems, Inc. Synchronizing partially pipelined instructions in vliw processors
EP1442362A1 (de) 2001-10-24 2004-08-04 Telefonaktiebolaget LM Ericsson (publ) Anordnung und verfahren in der prozessortechnologie
JP4230461B2 (ja) * 2002-09-17 2009-02-25 エヌエックスピー ビー ヴィ 完全同期方式スーパーパイプライン型ｖｌｉｗプロセッサのシステムおよび方法
US20040128475A1 (en) * 2002-12-31 2004-07-01 Gad Sheaffer Widely accessible processor register file and method for use
JP4551635B2 (ja) * 2003-07-31 2010-09-29 ソニー株式会社 パイプライン処理システムおよび情報処理装置
JP4082300B2 (ja) * 2003-08-29 2008-04-30 ソニー株式会社 パイプライン処理システムおよび情報処理装置
JP2005078656A (ja) * 2003-08-29 2005-03-24 Sony Corp パイプライン処理システムおよび情報処理装置
US7124318B2 (en) * 2003-09-18 2006-10-17 International Business Machines Corporation Multiple parallel pipeline processor having self-repairing capability
US7415705B2 (en) * 2004-01-14 2008-08-19 International Business Machines Corporation Autonomic method and apparatus for hardware assist for patching code
US8862835B2 (en) * 2011-06-14 2014-10-14 Texas Instruments Incorporated Multi-port register file with an input pipelined architecture and asynchronous read data forwarding
US8862836B2 (en) * 2011-06-14 2014-10-14 Texas Instruments Incorporated Multi-port register file with an input pipelined architecture with asynchronous reads and localized feedback
US10802987B2 (en) * 2013-10-15 2020-10-13 Mill Computing, Inc. Computer processor employing cache memory storing backless cache lines
US20150261542A1 (en) * 2014-03-14 2015-09-17 Arm Limited Data processing apparatus and method for performing data processing operation with a conditional processing step
US20160232006A1 (en) * 2015-02-09 2016-08-11 Qualcomm Incorporated Fan out of result of explicit data graph execution instruction

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GB1527289A (en) * 1976-08-17 1978-10-04 Int Computers Ltd Data processing systems
US4228497A (en) * 1977-11-17 1980-10-14 Burroughs Corporation Template micromemory structure for a pipelined microprogrammable data processing system
US4598365A (en) * 1983-04-01 1986-07-01 Honeywell Information Systems Inc. Pipelined decimal character execution unit
JPH0650512B2 (ja) * 1984-07-11 1994-06-29 日本電気株式会社 デ−タ処理装置
US4819155A (en) * 1987-06-01 1989-04-04 Wulf William A Apparatus for reading to and writing from memory streams of data while concurrently executing a plurality of data processing operations
US4991078A (en) * 1987-09-29 1991-02-05 Digital Equipment Corporation Apparatus and method for a pipelined central processing unit in a data processing system
US5019967A (en) * 1988-07-20 1991-05-28 Digital Equipment Corporation Pipeline bubble compression in a computer system
US5148536A (en) * 1988-07-25 1992-09-15 Digital Equipment Corporation Pipeline having an integral cache which processes cache misses and loads data in parallel
US5129067A (en) * 1989-06-06 1992-07-07 Advanced Micro Devices, Inc. Multiple instruction decoder for minimizing register port requirements
US5136697A (en) * 1989-06-06 1992-08-04 Advanced Micro Devices, Inc. System for reducing delay for execution subsequent to correctly predicted branch instruction using fetch information stored with each block of instructions in cache
US5299320A (en) * 1990-09-03 1994-03-29 Matsushita Electric Industrial Co., Ltd. Program control type vector processor for executing a vector pipeline operation for a series of vector data which is in accordance with a vector pipeline
US5261071A (en) * 1991-03-21 1993-11-09 Control Data System, Inc. Dual pipe cache memory with out-of-order issue capability
JP2693651B2 (ja) * 1991-04-30 1997-12-24 株式会社東芝 並列プロセッサー
US5345569A (en) * 1991-09-20 1994-09-06 Advanced Micro Devices, Inc. Apparatus and method for resolving dependencies among a plurality of instructions within a storage device
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US5274818A (en) * 1992-02-03 1993-12-28 Thinking Machines Corporation System and method for compiling a fine-grained array based source program onto a course-grained hardware
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US5337415A (en) * 1992-12-04 1994-08-09 Hewlett-Packard Company Predecoding instructions for supercalar dependency indicating simultaneous execution for increased operating frequency

Also Published As

Publication number Publication date
EP0653703A1 (de) 1995-05-17
KR100346515B1 (ko) 2002-11-30
US6128721A (en) 2000-10-03
KR950015093A (ko) 1995-06-16
JPH07191846A (ja) 1995-07-28
EP0653703B1 (de) 1999-04-28
DE69418146T2 (de) 1999-11-25

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