DE69414846D1 - Methode zur elektrische Isolation von Kühlkörpern in elektronischen Leistungsschaltungen - Google Patents

Methode zur elektrische Isolation von Kühlkörpern in elektronischen Leistungsschaltungen

Info

Publication number
DE69414846D1
DE69414846D1 DE69414846T DE69414846T DE69414846D1 DE 69414846 D1 DE69414846 D1 DE 69414846D1 DE 69414846 T DE69414846 T DE 69414846T DE 69414846 T DE69414846 T DE 69414846T DE 69414846 D1 DE69414846 D1 DE 69414846D1
Authority
DE
Germany
Prior art keywords
electrical insulation
heat sinks
electronic power
power circuits
circuits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69414846T
Other languages
English (en)
Other versions
DE69414846T2 (de
Inventor
Paolo Crema
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
Original Assignee
SGS Thomson Microelectronics SRL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SGS Thomson Microelectronics SRL filed Critical SGS Thomson Microelectronics SRL
Publication of DE69414846D1 publication Critical patent/DE69414846D1/de
Application granted granted Critical
Publication of DE69414846T2 publication Critical patent/DE69414846T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
    • H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
    • H01L23/4334—Auxiliary members in encapsulations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367—Cooling facilitated by shape of device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
DE69414846T 1994-09-20 1994-09-20 Methode zur elektrische Isolation von Kühlkörpern in elektronischen Leistungsschaltungen Expired - Fee Related DE69414846T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP94830442A EP0703612B1 (de) 1994-09-20 1994-09-20 Methode zur elektrische Isolation von Kühlkörpern in elektronischen Leistungsschaltungen

Publications (2)

Publication Number Publication Date
DE69414846D1 true DE69414846D1 (de) 1999-01-07
DE69414846T2 DE69414846T2 (de) 1999-05-20

Family

ID=8218526

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69414846T Expired - Fee Related DE69414846T2 (de) 1994-09-20 1994-09-20 Methode zur elektrische Isolation von Kühlkörpern in elektronischen Leistungsschaltungen

Country Status (4)

Country Link
US (1) US5789279A (de)
EP (1) EP0703612B1 (de)
JP (1) JP2700449B2 (de)
DE (1) DE69414846T2 (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6063646A (en) * 1998-10-06 2000-05-16 Japan Rec Co., Ltd. Method for production of semiconductor package
EP2206145A4 (de) * 2007-09-28 2012-03-28 Tessera Inc Flip-chip-verbindung mit doppelten pfosten
US20100044860A1 (en) * 2008-08-21 2010-02-25 Tessera Interconnect Materials, Inc. Microelectronic substrate or element having conductive pads and metal posts joined thereto using bond layer
US8580607B2 (en) 2010-07-27 2013-11-12 Tessera, Inc. Microelectronic packages with nanoparticle joining
US8853558B2 (en) 2010-12-10 2014-10-07 Tessera, Inc. Interconnect structure
TWI601249B (zh) * 2013-05-22 2017-10-01 Kaneka Corp Cooling structure
US9633971B2 (en) 2015-07-10 2017-04-25 Invensas Corporation Structures and methods for low temperature bonding using nanoparticles
US10886250B2 (en) 2015-07-10 2021-01-05 Invensas Corporation Structures and methods for low temperature bonding using nanoparticles

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5480079A (en) * 1978-08-07 1979-06-26 Dai Ichi Seiko Co Ltd Method of forming semiconductor seal
JPS55143054A (en) * 1979-04-25 1980-11-08 Hitachi Ltd Resin sealed semiconductor device
JPS5753947A (en) * 1980-09-17 1982-03-31 Hitachi Ltd Transistor and electronic device containing it
JPS6077445A (ja) * 1983-10-05 1985-05-02 Toshiba Corp 樹脂封止型半導体装置
JPS60132350A (ja) * 1983-12-21 1985-07-15 Toshiba Corp 樹脂封止半導体装置
JPS61194755A (ja) * 1985-02-25 1986-08-29 Hitachi Ltd 半導体装置
JP2503778B2 (ja) * 1988-10-07 1996-06-05 三菱マテリアル株式会社 半導体装置用基板
JPH0424952A (ja) * 1990-05-15 1992-01-28 Mitsubishi Materials Corp ハイブリッド型半導体装置
JPH04123442A (ja) * 1990-09-14 1992-04-23 Hitachi Ltd 半導体集積回路装置

Also Published As

Publication number Publication date
JP2700449B2 (ja) 1998-01-21
US5789279A (en) 1998-08-04
JPH08111482A (ja) 1996-04-30
EP0703612B1 (de) 1998-11-25
EP0703612A1 (de) 1996-03-27
DE69414846T2 (de) 1999-05-20

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee