DE69330924D1 - Plattennetzwerk programmierbares Steuerungsgerät - Google Patents

Plattennetzwerk programmierbares Steuerungsgerät

Info

Publication number
DE69330924D1
DE69330924D1 DE69330924T DE69330924T DE69330924D1 DE 69330924 D1 DE69330924 D1 DE 69330924D1 DE 69330924 T DE69330924 T DE 69330924T DE 69330924 T DE69330924 T DE 69330924T DE 69330924 D1 DE69330924 D1 DE 69330924D1
Authority
DE
Germany
Prior art keywords
buffer memory
data
disk
disk drives
programmable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69330924T
Other languages
English (en)
Other versions
DE69330924T2 (de
Inventor
John G Mcbride
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hewlett Packard Development Co LP
Original Assignee
Hewlett Packard Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hewlett Packard Co filed Critical Hewlett Packard Co
Publication of DE69330924D1 publication Critical patent/DE69330924D1/de
Application granted granted Critical
Publication of DE69330924T2 publication Critical patent/DE69330924T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/88—Masking faults in memories by using spares or by reconfiguring with partially good memories
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0656—Data buffering arrangements
DE69330924T 1992-07-06 1993-07-01 Plattennetzwerk programmierbares Steuerungsgerät Expired - Fee Related DE69330924T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/909,902 US5471640A (en) 1992-07-06 1992-07-06 Programmable disk array controller having n counters for n disk drives for stripping data where each counter addresses specific memory location by a count n

Publications (2)

Publication Number Publication Date
DE69330924D1 true DE69330924D1 (de) 2001-11-22
DE69330924T2 DE69330924T2 (de) 2002-04-11

Family

ID=25428009

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69330924T Expired - Fee Related DE69330924T2 (de) 1992-07-06 1993-07-01 Plattennetzwerk programmierbares Steuerungsgerät

Country Status (4)

Country Link
US (1) US5471640A (de)
EP (1) EP0578139B1 (de)
JP (1) JPH06161672A (de)
DE (1) DE69330924T2 (de)

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US5878280A (en) * 1993-09-23 1999-03-02 Philips Electronics North America Corp. Data buffering system for plural data memory arrays
US5712976A (en) * 1994-09-08 1998-01-27 International Business Machines Corporation Video data streamer for simultaneously conveying same one or different ones of data blocks stored in storage node to each of plurality of communication nodes
US5761417A (en) * 1994-09-08 1998-06-02 International Business Machines Corporation Video data streamer having scheduler for scheduling read request for individual data buffers associated with output ports of communication node to one storage node
US5555424A (en) * 1994-10-06 1996-09-10 The Dow Chemical Company Extended Harvard architecture computer memory system with programmable variable address increment
EP0727750B1 (de) * 1995-02-17 2004-05-12 Kabushiki Kaisha Toshiba Server für kontinuierliche Daten und Datentransferschema für mehrfache gleichzeitige Datenzugriffe
US5603050A (en) * 1995-03-03 1997-02-11 Compaq Computer Corporation Direct memory access controller having programmable timing
WO1996037840A1 (en) * 1995-05-22 1996-11-28 Mti Technology Corporation Disk array system including a dual-ported staging memory and concurrent redundancy calculation capability
US5678061A (en) * 1995-07-19 1997-10-14 Lucent Technologies Inc. Method for employing doubly striped mirroring of data and reassigning data streams scheduled to be supplied by failed disk to respective ones of remaining disks
US5893138A (en) * 1995-10-02 1999-04-06 International Business Machines Corporation System and method for improving channel hardware performance for an array controller
JP2981482B2 (ja) * 1995-12-06 1999-11-22 日本アイ・ビー・エム株式会社 データ記憶システム、データ転送方法及びデータ再構成方法
JPH09251437A (ja) * 1996-03-18 1997-09-22 Toshiba Corp 計算機装置及び連続データサーバ装置
US6018778A (en) 1996-05-03 2000-01-25 Netcell Corporation Disk array controller for reading/writing striped data using a single address counter for synchronously transferring data between data ports and buffer memory
KR100205072B1 (ko) * 1996-12-05 1999-06-15 정선종 디스크 어레이 제어기에서의 vram 기판 패리티 엔진
US5953352A (en) * 1997-06-23 1999-09-14 Micron Electronics, Inc. Method of checking data integrity for a raid 1 system
US6061822A (en) * 1997-06-23 2000-05-09 Micron Electronics, Inc. System and method for providing a fast and efficient comparison of cyclic redundancy check (CRC/checks sum) values of two mirrored disks
US6151641A (en) * 1997-09-30 2000-11-21 Lsi Logic Corporation DMA controller of a RAID storage controller with integrated XOR parity computation capability adapted to compute parity in parallel with the transfer of data segments
US6098119A (en) * 1998-01-21 2000-08-01 Mylex Corporation Apparatus and method that automatically scans for and configures previously non-configured disk drives in accordance with a particular raid level based on the needed raid level
US6701447B1 (en) * 2000-09-06 2004-03-02 International Business Machines Corporation System for delaying the counting of occurrences of a plurality of events occurring in a processor until the disposition of the event has been determined
US6658584B1 (en) 2000-09-06 2003-12-02 International Business Machines Corporation Method and structure for managing large counter arrays
US7200715B2 (en) * 2002-03-21 2007-04-03 Network Appliance, Inc. Method for writing contiguous arrays of stripes in a RAID storage system using mapped block writes
US6952794B2 (en) * 2002-10-10 2005-10-04 Ching-Hung Lu Method, system and apparatus for scanning newly added disk drives and automatically updating RAID configuration and rebuilding RAID data
EP1625489A2 (de) * 2003-04-21 2006-02-15 Netcell Corp. Plattenarray-steuerung mit umkonfigurierbarem datenweg
US8560807B2 (en) 2011-12-14 2013-10-15 International Business Machines Corporation Accessing a logic device through a serial interface

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3626374A (en) * 1970-02-10 1971-12-07 Bell Telephone Labor Inc High-speed data-directed information processing system characterized by a plural-module byte-organized memory unit
US4509118A (en) * 1982-05-25 1985-04-02 Honeywell Information Systems Inc. Method and apparatus for defining magnetic disk track field lengths using a programmable counter
US4688168A (en) * 1984-08-23 1987-08-18 Picker International Inc. High speed data transfer method and apparatus
AU630635B2 (en) * 1988-11-14 1992-11-05 Emc Corporation Arrayed disk drive system and method
US5146574A (en) * 1989-06-27 1992-09-08 Sf2 Corporation Method and circuit for programmable selecting a variable sequence of element using write-back
CA2029179A1 (en) * 1989-11-03 1991-05-04 Stephen M. Schultz Method for data distribution in a disk array
US5208813A (en) * 1990-10-23 1993-05-04 Array Technology Corporation On-line reconstruction of a failed redundant array system
DE69131551T2 (de) * 1990-11-09 2000-02-17 Emc Corp Logische Aufteilung eines Speichersystems mit redundanter Matrix
EP0487901A3 (en) * 1990-11-29 1992-09-23 Hewlett-Packard Company Disk controller using a video ram

Also Published As

Publication number Publication date
US5471640A (en) 1995-11-28
JPH06161672A (ja) 1994-06-10
EP0578139A2 (de) 1994-01-12
EP0578139A3 (de) 1998-02-18
EP0578139B1 (de) 2001-10-17
DE69330924T2 (de) 2002-04-11

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: HEWLETT-PACKARD DEVELOPMENT CO., L.P., HOUSTON, TE

8339 Ceased/non-payment of the annual fee