DE69321698D1 - Verfahren und System zur verbesserten Genauigkeit der Sprungvorhersage in einem Superskalarprozessor - Google Patents

Verfahren und System zur verbesserten Genauigkeit der Sprungvorhersage in einem Superskalarprozessor

Info

Publication number
DE69321698D1
DE69321698D1 DE69321698T DE69321698T DE69321698D1 DE 69321698 D1 DE69321698 D1 DE 69321698D1 DE 69321698 T DE69321698 T DE 69321698T DE 69321698 T DE69321698 T DE 69321698T DE 69321698 D1 DE69321698 D1 DE 69321698D1
Authority
DE
Germany
Prior art keywords
improved accuracy
superscalar processor
jump prediction
jump
prediction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69321698T
Other languages
English (en)
Other versions
DE69321698T2 (de
Inventor
David S Levitan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of DE69321698D1 publication Critical patent/DE69321698D1/de
Application granted granted Critical
Publication of DE69321698T2 publication Critical patent/DE69321698T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3842—Speculative instruction execution
    • G06F9/3844—Speculative instruction execution using dynamic branch prediction, e.g. using branch history tables

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
DE69321698T 1993-01-08 1993-12-27 Verfahren und System zur verbesserten Genauigkeit der Sprungvorhersage in einem Superskalarprozessor Expired - Fee Related DE69321698T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/002,289 US5367703A (en) 1993-01-08 1993-01-08 Method and system for enhanced branch history prediction accuracy in a superscalar processor system

Publications (2)

Publication Number Publication Date
DE69321698D1 true DE69321698D1 (de) 1998-11-26
DE69321698T2 DE69321698T2 (de) 1999-06-10

Family

ID=21700094

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69321698T Expired - Fee Related DE69321698T2 (de) 1993-01-08 1993-12-27 Verfahren und System zur verbesserten Genauigkeit der Sprungvorhersage in einem Superskalarprozessor

Country Status (4)

Country Link
US (1) US5367703A (de)
EP (1) EP0605876B1 (de)
JP (1) JP2531495B2 (de)
DE (1) DE69321698T2 (de)

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EP0651324B1 (de) * 1993-10-29 2006-03-22 Advanced Micro Devices, Inc. Spekulative Befehlswarteschlange für Befehle mit variabler Byteslänge
US5689672A (en) * 1993-10-29 1997-11-18 Advanced Micro Devices, Inc. Pre-decoded instruction cache and method therefor particularly suitable for variable byte-length instructions
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US5574871A (en) * 1994-01-04 1996-11-12 Intel Corporation Method and apparatus for implementing a set-associative branch target buffer
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JP3290567B2 (ja) * 1995-08-24 2002-06-10 富士通株式会社 プロファイル計装方法
US5764970A (en) * 1995-11-20 1998-06-09 International Business Machines Corporation Method and apparatus for supporting speculative branch and link/branch on count instructions
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US5742805A (en) * 1996-02-15 1998-04-21 Fujitsu Ltd. Method and apparatus for a single history register based branch predictor in a superscalar microprocessor
US5909573A (en) * 1996-03-28 1999-06-01 Intel Corporation Method of branch prediction using loop counters
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US5864697A (en) * 1996-06-28 1999-01-26 Texas Instruments Incorporated Microprocessor using combined actual and speculative branch history prediction
US5774710A (en) * 1996-09-19 1998-06-30 Advanced Micro Devices, Inc. Cache line branch prediction scheme that shares among sets of a set associative cache
US5758143A (en) * 1996-10-07 1998-05-26 International Business Machines Corporation Method for updating a branch history table in a processor which resolves multiple branches in a single cycle
US5794028A (en) * 1996-10-17 1998-08-11 Advanced Micro Devices, Inc. Shared branch prediction structure
JP3641327B2 (ja) * 1996-10-18 2005-04-20 株式会社ルネサステクノロジ データプロセッサ及びデータ処理システム
US5918044A (en) * 1996-10-31 1999-06-29 International Business Machines Corporation Apparatus and method for instruction fetching using a multi-port instruction cache directory
US5954816A (en) * 1996-11-19 1999-09-21 Advanced Micro Devices, Inc. Branch selector prediction
US5978906A (en) * 1996-11-19 1999-11-02 Advanced Micro Devices, Inc. Branch selectors associated with byte ranges within an instruction cache for rapidly identifying branch predictions
US5995749A (en) * 1996-11-19 1999-11-30 Advanced Micro Devices, Inc. Branch prediction mechanism employing branch selectors to select a branch prediction
US6253316B1 (en) * 1996-11-19 2001-06-26 Advanced Micro Devices, Inc. Three state branch history using one bit in a branch prediction mechanism
US5857104A (en) * 1996-11-26 1999-01-05 Hewlett-Packard Company Synthetic dynamic branch prediction
US6088793A (en) * 1996-12-30 2000-07-11 Intel Corporation Method and apparatus for branch execution on a multiple-instruction-set-architecture microprocessor
SE520343C2 (sv) * 1997-02-12 2003-07-01 Ericsson Telefon Ab L M Förfarande, system och dator för grenprediktion
US5974538A (en) * 1997-02-21 1999-10-26 Wilmot, Ii; Richard Byron Method and apparatus for annotating operands in a computer system with source instruction identifiers
TW357318B (en) * 1997-03-18 1999-05-01 Ind Tech Res Inst Branching forecast and reading device for unspecified command length extra-purity pipeline processor
US5822576A (en) * 1997-03-26 1998-10-13 International Business Machines Corporation Branch history table with branch pattern field
US5838962A (en) * 1997-04-09 1998-11-17 Hewlett-Packard Company Interrupt driven dynamic adjustment of branch predictions
US5941985A (en) * 1997-06-24 1999-08-24 Sun Microsystems, Inc. Branch instruction prediction method
US5857098A (en) * 1997-06-24 1999-01-05 Samsung Electronics Co., Ltd. Branch instruction prediction apparatus
US6385720B1 (en) * 1997-07-14 2002-05-07 Matsushita Electric Industrial Co., Ltd. Branch prediction method and processor using origin information, relative position information and history information
US6108774A (en) * 1997-12-19 2000-08-22 Advanced Micro Devices, Inc. Branch prediction with added selector bits to increase branch prediction capacity and flexibility with minimal added bits
US6223280B1 (en) * 1998-07-16 2001-04-24 Advanced Micro Devices, Inc. Method and circuit for preloading prediction circuits in microprocessors
US6353883B1 (en) 1998-08-04 2002-03-05 Intel Corporation Method and apparatus for performing predicate prediction
US6230260B1 (en) 1998-09-01 2001-05-08 International Business Machines Corporation Circuit arrangement and method of speculative instruction execution utilizing instruction history caching
US6367004B1 (en) * 1998-12-31 2002-04-02 Intel Corporation Method and apparatus for predicting a predicate based on historical information and the least significant bits of operands to be compared
US6484256B1 (en) * 1999-08-09 2002-11-19 International Business Machines Corporation Apparatus and method of branch prediction utilizing a comparison of a branch history table to an aliasing table
US6647490B2 (en) 1999-10-14 2003-11-11 Advanced Micro Devices, Inc. Training line predictor for branch targets
US6976157B1 (en) 1999-11-04 2005-12-13 International Business Machines Corporation Circuits, systems and methods for performing branch predictions by selectively accessing bimodal and fetch-based history tables
US6502188B1 (en) 1999-11-16 2002-12-31 Advanced Micro Devices, Inc. Dynamic classification of conditional branches in global history branch prediction
US6823446B1 (en) 2000-04-13 2004-11-23 International Business Machines Corporation Apparatus and method for performing branch predictions using dual branch history tables and for updating such branch history tables
US6745323B1 (en) 2000-08-03 2004-06-01 International Business Machines Corporation Global history vector recovery circuits and methods and systems using the same
US7000096B1 (en) 2000-08-03 2006-02-14 International Business Machines Corporation Branch prediction circuits and methods and systems using the same
US6948055B1 (en) * 2000-10-09 2005-09-20 Sun Microsystems, Inc. Accuracy of multiple branch prediction schemes
US8285976B2 (en) * 2000-12-28 2012-10-09 Micron Technology, Inc. Method and apparatus for predicting branches using a meta predictor
JP3738842B2 (ja) * 2002-06-04 2006-01-25 富士通株式会社 遅延分岐機能を備えた情報処理装置
US7024663B2 (en) 2002-07-10 2006-04-04 Micron Technology, Inc. Method and system for generating object code to facilitate predictive memory retrieval
US6954836B2 (en) * 2002-07-11 2005-10-11 Micron Technology, Inc. System and method for processor with predictive memory retrieval assist
US7254693B2 (en) * 2004-12-02 2007-08-07 International Business Machines Corporation Selectively prohibiting speculative execution of conditional branch type based on instruction bit
US8151092B2 (en) * 2005-01-12 2012-04-03 International Business Machines Corporation Control signal memoization in a multiple instruction issue microprocessor
US20110078425A1 (en) * 2009-09-25 2011-03-31 Shah Manish K Branch prediction mechanism for predicting indirect branch targets
WO2011132475A1 (ja) * 2010-04-19 2011-10-27 日本電気株式会社 処理手順管理装置、処理手順管理方法、処理手順管理システム、および処理手順管理プログラム
WO2013101121A1 (en) 2011-12-29 2013-07-04 Intel Corporation Managed instruction cache prefetching
US9201658B2 (en) * 2012-09-24 2015-12-01 Apple Inc. Branch predictor for wide issue, arbitrarily aligned fetch that can cross cache line boundaries
US20140180848A1 (en) * 2012-12-20 2014-06-26 Wal-Mart Stores, Inc. Estimating Point Of Sale Wait Times
US10108423B2 (en) * 2015-03-25 2018-10-23 International Business Machines Corporation History buffer with single snoop tag for multiple-field registers
JP6970603B2 (ja) * 2017-12-08 2021-11-24 日鉄工材株式会社 金属箔製造装置，電極板及び金属箔の製造方法
US11163577B2 (en) 2018-11-26 2021-11-02 International Business Machines Corporation Selectively supporting static branch prediction settings only in association with processor-designated types of instructions

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Also Published As

Publication number Publication date
JPH06236270A (ja) 1994-08-23
EP0605876B1 (de) 1998-10-21
US5367703A (en) 1994-11-22
JP2531495B2 (ja) 1996-09-04
EP0605876A1 (de) 1994-07-13
DE69321698T2 (de) 1999-06-10

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Legal Events

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8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee