ES2138051T3 - Metodo y aparato para la realizacion de un sistema de resolucion de bifurcaciones en cuatro etapas en un procesador informatico. - Google Patents

Metodo y aparato para la realizacion de un sistema de resolucion de bifurcaciones en cuatro etapas en un procesador informatico.

Info

Publication number
ES2138051T3
ES2138051T3 ES94307771T ES94307771T ES2138051T3 ES 2138051 T3 ES2138051 T3 ES 2138051T3 ES 94307771 T ES94307771 T ES 94307771T ES 94307771 T ES94307771 T ES 94307771T ES 2138051 T3 ES2138051 T3 ES 2138051T3
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ES
Spain
Prior art keywords
branch
stage
instructions
instruction
final
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES94307771T
Other languages
English (en)
Inventor
Bradley D Hoyt
Glenn J Hinton
David B Papworth
Ashwani Kumar Gupta
Michael Alan Fetterman
Subramanian Natarajan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Application granted granted Critical
Publication of ES2138051T3 publication Critical patent/ES2138051T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/322—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3804—Instruction prefetching for branches, e.g. hedging, branch folding
    • G06F9/3806—Instruction prefetching for branches, e.g. hedging, branch folding using address prediction, e.g. return stack, branch history buffer
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3842—Speculative instruction execution
    • G06F9/3848—Speculative instruction execution using hybrid branch prediction, e.g. selection between prediction techniques
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
    • G06F9/3856—Reordering of instructions, e.g. using queues or age tags
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
    • G06F9/3863—Recovery, e.g. branch miss-prediction, exception handling using multiple copies of the architectural state, e.g. shadow registers

Abstract

EN ESTE INVENTO SE DESCRIBE UN SISTEMA DE RESOLUCION DE INSTRUCCIONES DE BIFURCACION DE CUATRO ETAPAS PARA UN PROCESADOR EN CASCADA. UNA PRIMERA ETAPA DEL SISTEMA DE RESOLUCION DE INSTRUCCIONES DE BIFURCACION, TAL COMO UNA UNIDAD DE RASTREO DE INSTRUCCIONES QUE PUEDE RASTREAR CONTINUAMENTE INSTRUCCIONES, PREDICE LA EXISTENCIA Y EL RESULTADO DE LAS INSTRUCCIONES DE BIFURCACION DENTRO DE UNA CORRIENTE DE INSTRUCCIONES. UNA SEGUNDA ETAPA DECODIFICA TODAS LAS INSTRUCCIONES RASTREADAS. SI LA ETAPA DE DECODIFICACION DETERMINA QUE UNA INSTRUCCION DE BIFURCACION PREDICHA POR LA PRIMERA ETAPA NO ES UNA INSTRUCCION DE BIFURCACION, LA ETAPA DE DECODIFICACION DESCARGA EL CANAL Y REINICIA EL PROCESADOR EN UNA DIRECCION CORRECTA. LA ETAPA DE DECODIFICACION VERIFICA TODAS LAS PREDICCIONES DE BIFURCACION HECHAS POR LA ETAPA DE PREDICCION DE BIFURCACION. FINALMENTE, LA ETAPA DE DECODIFICACION HACE PREDICCIONES DE BIFURCACION PARA LAS BIFURCACIONES NO PREDICHAS POR LA ETAPA DE PREDICCION DE BIFURCACION. UNATERCERA ETAPA EJECUTA TODAS LAS INSTRUCCIONES DE BIFURCACION PARA DETERMINAR UN RESULTADO DE BIFURCACION FINAL Y UNA DIRECCION OBJETO DE BIFURCACION FINAL. LA ETAPA DE EJECUCION DE BIFURCACION COMPARA EL RESULTADO DE BIFURCACION FINAL Y LA DIRECCION OBJETO DE BIFURCACION FINAL CON EL RESULTADO DE BIFURCACION PREDICHO Y LA DIRECCION OBJETO DE BIFURCACION PREDICHA PARA DETERMINAR SI EL PROCESADOR DEBE DE DESCARGAR EL EXTREMO DELANTERO DEL CANAL DEL MICROPROCESADOR Y REINICIAR EN UNA DIRECCION CORRECTA. UNA ETAPA FINAL DE RESOLUCION DE BIFURCACION RETIRA TODAS LAS INSTRUCCIONES DE BIFURCACION. LA ETAPA DE ELIMINACION ASEGURA QUE NO SE COMETEN PERMANENTEMENTE EN CUALQUIER INSTRUCCION RASTREADA DESPUES DE UN BIFURCACION MAL PREDICHA.
ES94307771T 1994-01-03 1994-10-21 Metodo y aparato para la realizacion de un sistema de resolucion de bifurcaciones en cuatro etapas en un procesador informatico. Expired - Lifetime ES2138051T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US17678594A 1994-01-03 1994-01-03

Publications (1)

Publication Number Publication Date
ES2138051T3 true ES2138051T3 (es) 2000-01-01

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
ES94307771T Expired - Lifetime ES2138051T3 (es) 1994-01-03 1994-10-21 Metodo y aparato para la realizacion de un sistema de resolucion de bifurcaciones en cuatro etapas en un procesador informatico.

Country Status (8)

Country Link
US (1) US5812839A (es)
EP (1) EP0661625B1 (es)
AT (1) ATE184407T1 (es)
DE (1) DE69420540T2 (es)
DK (1) DK0661625T3 (es)
ES (1) ES2138051T3 (es)
GR (1) GR3036841T3 (es)
SG (1) SG52391A1 (es)

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Also Published As

Publication number Publication date
DE69420540T2 (de) 2000-02-10
ATE184407T1 (de) 1999-09-15
US5812839A (en) 1998-09-22
GR3036841T3 (en) 2002-01-31
EP0661625A2 (en) 1995-07-05
EP0661625A3 (es) 1995-08-16
DE69420540D1 (de) 1999-10-14
EP0661625B1 (en) 1999-09-08
SG52391A1 (en) 1998-09-28
DK0661625T3 (da) 2000-04-03

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