DE69230130D1 - Steuereinrichtung für Daten-Ein-/Ausgang und diese beinhaltender Ein-Chip-Mikrocomputer - Google Patents

Steuereinrichtung für Daten-Ein-/Ausgang und diese beinhaltender Ein-Chip-Mikrocomputer

Info

Publication number
DE69230130D1
DE69230130D1 DE69230130T DE69230130T DE69230130D1 DE 69230130 D1 DE69230130 D1 DE 69230130D1 DE 69230130 T DE69230130 T DE 69230130T DE 69230130 T DE69230130 T DE 69230130T DE 69230130 D1 DE69230130 D1 DE 69230130D1
Authority
DE
Germany
Prior art keywords
output
control device
data input
chip microcomputer
microcomputer containing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69230130T
Other languages
English (en)
Other versions
DE69230130T2 (de
Inventor
Minoru Okamoto
Mikio Sakakibara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Publication of DE69230130D1 publication Critical patent/DE69230130D1/de
Application granted granted Critical
Publication of DE69230130T2 publication Critical patent/DE69230130T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
    • G06F13/423—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus with synchronous protocol
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
DE69230130T 1991-12-24 1992-12-22 Steuereinrichtung für Daten-Ein-/Ausgang und diese beinhaltender Ein-Chip-Mikrocomputer Expired - Fee Related DE69230130T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP34101391A JP3190398B2 (ja) 1991-12-24 1991-12-24 データ入出力制御装置及び方法

Publications (2)

Publication Number Publication Date
DE69230130D1 true DE69230130D1 (de) 1999-11-18
DE69230130T2 DE69230130T2 (de) 2000-03-30

Family

ID=18342408

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69230130T Expired - Fee Related DE69230130T2 (de) 1991-12-24 1992-12-22 Steuereinrichtung für Daten-Ein-/Ausgang und diese beinhaltender Ein-Chip-Mikrocomputer

Country Status (4)

Country Link
US (1) US5504927A (de)
EP (1) EP0549334B1 (de)
JP (1) JP3190398B2 (de)
DE (1) DE69230130T2 (de)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3490131B2 (ja) * 1994-01-21 2004-01-26 株式会社ルネサステクノロジ データ転送制御方法、データプロセッサ及びデータ処理システム
JP3155144B2 (ja) * 1994-03-25 2001-04-09 ローム株式会社 データ転送方法及び装置
JP3253547B2 (ja) * 1996-03-28 2002-02-04 株式会社沖データ データ転送システム
US5884099A (en) * 1996-05-31 1999-03-16 Sun Microsystems, Inc. Control circuit for a buffer memory to transfer data between systems operating at different speeds
ES2116935B1 (es) * 1996-11-11 1999-03-01 Telefonica Nacional Espana Co Circuito integrado sincronizador de datos entre redes.
US5794019A (en) * 1997-01-22 1998-08-11 International Business Machines Corp. Processor with free running clock with momentary synchronization to subsystem clock during data transfers
JPH10222464A (ja) * 1997-01-31 1998-08-21 Mitsubishi Electric Corp 同期式直列データ転送装置
US5875320A (en) * 1997-03-24 1999-02-23 International Business Machines Corporation System and method for synchronizing plural processor clocks in a multiprocessor system
US5913075A (en) * 1997-03-25 1999-06-15 International Business Machines Corporation High speed communication between high cycle rate electronic devices using a low cycle rate bus
US5987081A (en) * 1997-06-27 1999-11-16 Sun Microsystems, Inc. Method and apparatus for a testable high frequency synchronizer
US6101561A (en) * 1998-02-06 2000-08-08 International Business Machines Corporation System for providing an increase in digital data transmission rate over a parallel bus by converting binary format voltages to encoded analog format currents
JP2002082813A (ja) 2000-06-26 2002-03-22 Nippon Computer:Kk プログラムロジック装置
US7020726B2 (en) * 2001-05-24 2006-03-28 Lsi Logic Corporation Methods and apparatus for signaling to switch between different bus bandwidths
US7466720B2 (en) * 2002-10-18 2008-12-16 Ole Bentz Flexible architecture for SONET and OTN frame processing
US7242737B2 (en) * 2003-07-09 2007-07-10 International Business Machines Corporation System and method for data phase realignment

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5654529A (en) * 1979-10-08 1981-05-14 Nec Corp Data processor
JPS57120146A (en) * 1981-01-16 1982-07-27 Hitachi Ltd Data transfer device
JPS59200327A (ja) * 1983-04-26 1984-11-13 Nec Corp 周辺装置の制御方式
US4642791A (en) * 1983-09-15 1987-02-10 Pitney Bowes Inc. Interface for mailing system peripheral devices
JPS60107168A (ja) * 1983-11-16 1985-06-12 Nec Corp 信号送受信回路
DE3789743T2 (de) * 1986-09-01 1994-08-18 Nec Corp Serielles Datenübertragungssystem.
US4761735A (en) * 1986-12-19 1988-08-02 Ncr Corporation Data transfer circuit between a processor and a peripheral
US5200925A (en) * 1988-07-29 1993-04-06 Mitsubishi Denki Kabushiki Kaisha Serial access semiconductor memory device and operating method therefor
JPH0381851A (ja) * 1989-08-25 1991-04-08 Seiko Instr Inc コプロセッサを用いたシリアル通信装置
JPH03228161A (ja) * 1990-02-02 1991-10-09 Hitachi Ltd 計算機システムのインタフェース制御方式

Also Published As

Publication number Publication date
EP0549334A3 (en) 1994-10-26
JPH05173925A (ja) 1993-07-13
JP3190398B2 (ja) 2001-07-23
EP0549334B1 (de) 1999-10-13
EP0549334A2 (de) 1993-06-30
DE69230130T2 (de) 2000-03-30
US5504927A (en) 1996-04-02

Similar Documents

Publication Publication Date Title
DE69132227T2 (de) Eingang-/Ausgangsteuerungseinrichtung
DE69230130D1 (de) Steuereinrichtung für Daten-Ein-/Ausgang und diese beinhaltender Ein-Chip-Mikrocomputer
DE69317017T2 (de) Eingabegerät
DE69123840D1 (de) Hydraulischer kreislauf und steuervorrichtung dafür
KR900017602U (ko) 휴대형 데이타 입력장치
DE69233132D1 (de) Hinweisanordnung und Steuerungsvorrichtung derselben
DE3381775D1 (de) Dynamisch interaktiv reagierendes steuerungsgeraet und anlage.
DE69628631D1 (de) Dateneingangs/-ausgangsvorrichtung durch Referenzierung zwischen zentralen Verarbeitungseinheiten und Ein-/Ausgabevorrichtungen
DE59206544D1 (de) Ein- und/oder Ausgabegerät für Prozessdaten
DE69215120D1 (de) Entwicklungsgerät und Entwicklerträgerelement dafür
DE69033134T2 (de) Daten-Lesevorrichtung und Steuersystem mit Daten-Lesevorrichtung
DE3855300T2 (de) Schnittstellenschaltung zur Datenübertragung zwischen Prozessor und Ein-/Ausgabevorrichtung
DE69306277T2 (de) Eingangsgerät
DE69325622T2 (de) Elektrophotographisches lichtempfindliches Element und elektrophotographisches Gerät und Geräte-Einheit die dieses beinhalten
DE68925605D1 (de) Belichtungsvorrichtung und Steuerung derselben
DE59510443D1 (de) Mit Silikonen kompatible Photoinitiatoren und diese enthaltende lichtempfindliche Gemische
DE69418111D1 (de) Steuergerät und Steuerverfahren für Bildeingabevorrichtung
DE3886825D1 (de) Prozessorgesteuerte Dateneingabe- und -ausgabeeinrichtung.
DE69029551D1 (de) Eingabe-/Ausgabe-Einrichtung und Steuerungssystem mit einer solchen Einrichtung
SE9301872L (sv) Beröringskänslig inmatningsenhet
DE69121125T2 (de) Informationsein-/ausgabevorrichtung
DE59108557D1 (de) Wissensbasierte steuer- und regeleinrichtung
DE69226310T2 (de) Entwicklungsgerät und Entwicklerträgerelement dafür
KR960027645U (ko) 데이타 입/출력 제어장치
KR940023287U (ko) 멀티프로세서 시스템의 데이타 전송 제어 장치

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee