DE69227584T2 - Nicht-fluechtige loeschbare und programmierbare verbindungszelle - Google Patents

Nicht-fluechtige loeschbare und programmierbare verbindungszelle

Info

Publication number
DE69227584T2
DE69227584T2 DE69227584T DE69227584T DE69227584T2 DE 69227584 T2 DE69227584 T2 DE 69227584T2 DE 69227584 T DE69227584 T DE 69227584T DE 69227584 T DE69227584 T DE 69227584T DE 69227584 T2 DE69227584 T2 DE 69227584T2
Authority
DE
Germany
Prior art keywords
transistor
terminal
programmable cell
cell
programmable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69227584T
Other languages
German (de)
English (en)
Other versions
DE69227584D1 (de
Inventor
Gregg Aloha Or 97007 Josephson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Lattice Semiconductor Corp
Original Assignee
Lattice Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lattice Semiconductor Corp filed Critical Lattice Semiconductor Corp
Application granted granted Critical
Publication of DE69227584D1 publication Critical patent/DE69227584D1/de
Publication of DE69227584T2 publication Critical patent/DE69227584T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/04Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0433Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and one or more separate select transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
  • Non-Volatile Memory (AREA)
DE69227584T 1991-05-06 1992-04-29 Nicht-fluechtige loeschbare und programmierbare verbindungszelle Expired - Fee Related DE69227584T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US07/696,453 US5251169A (en) 1991-05-06 1991-05-06 Non-volatile erasable and programmable interconnect cell
PCT/US1992/003619 WO1992020067A1 (en) 1991-05-06 1992-04-29 Non-volatile erasable and programmable interconnect cell

Publications (2)

Publication Number Publication Date
DE69227584D1 DE69227584D1 (de) 1998-12-17
DE69227584T2 true DE69227584T2 (de) 1999-05-06

Family

ID=24797130

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69227584T Expired - Fee Related DE69227584T2 (de) 1991-05-06 1992-04-29 Nicht-fluechtige loeschbare und programmierbare verbindungszelle

Country Status (5)

Country Link
US (1) US5251169A (enExample)
EP (1) EP0586473B1 (enExample)
JP (1) JPH06507039A (enExample)
DE (1) DE69227584T2 (enExample)
WO (1) WO1992020067A1 (enExample)

Families Citing this family (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0954102A1 (en) * 1991-12-09 1999-11-03 Fujitsu Limited Exclusive or/nor circuits
DE69326154T2 (de) * 1993-11-30 2000-02-24 Stmicroelectronics S.R.L., Agrate Brianza Integrierte Schaltung für die Programmierung einer Speicherzelle eines nicht flüchtigen Speicherregisters
US6005806A (en) 1996-03-14 1999-12-21 Altera Corporation Nonvolatile configuration cells and cell arrays
US5949710A (en) * 1996-04-10 1999-09-07 Altera Corporation Programmable interconnect junction
US6018476A (en) * 1996-09-16 2000-01-25 Altera Corporation Nonvolatile configuration cells and cell arrays
US5760605A (en) * 1996-09-30 1998-06-02 Advanced Micro Devices, Inc. Programmable high speed routing switch
US5923185A (en) * 1997-03-12 1999-07-13 Xilinx, Inc. Logic circuit programmable to implement at least two logic functions
US5838606A (en) * 1997-04-28 1998-11-17 Mitsubishi Semiconductor America, Inc. Three-transistor static storage cell
US5841694A (en) * 1997-07-30 1998-11-24 Programmable Silicon Solutions High performance programmable interconnect
US6535034B1 (en) 1997-07-30 2003-03-18 Programmable Silicon Solutions High performance integrated circuit devices adaptable to use lower supply voltages with smaller device geometries
US6426673B2 (en) 1997-07-30 2002-07-30 Programmable Silicon Solutions High performance integrated radio frequency circuit devices
FR2770326B1 (fr) * 1997-10-28 2001-12-28 Sgs Thomson Microelectronics Procede d'ecriture dans une memoire non volatile modifiable electriquement
US6470227B1 (en) * 1997-12-02 2002-10-22 Murali D. Rangachari Method and apparatus for automating a microelectric manufacturing process
US6118691A (en) * 1998-04-01 2000-09-12 National Semiconductor Corporation Memory cell with a Frohmann-Bentchkowsky EPROM memory transistor that reduces the voltage across an unprogrammed memory transistor during a read
US6141246A (en) * 1998-04-01 2000-10-31 National Semiconductor Corporation Memory device with sense amplifier that sets the voltage drop across the cells of the device
US6081451A (en) * 1998-04-01 2000-06-27 National Semiconductor Corporation Memory device that utilizes single-poly EPROM cells with CMOS compatible programming voltages
US6157574A (en) * 1998-04-01 2000-12-05 National Semiconductor Corporation Erasable frohmann-bentchkowsky memory transistor that stores multiple bits of data
US6055185A (en) * 1998-04-01 2000-04-25 National Semiconductor Corporation Single-poly EPROM cell with CMOS compatible programming voltages
US6289414B1 (en) * 1998-10-08 2001-09-11 Music Semiconductors, Inc. Partially ordered cams used in ternary hierarchical address searching/sorting
US6215701B1 (en) * 1998-12-22 2001-04-10 Oki Semiconductor Nonvolatile memory cell structure for integration with semiconductor logic devices and method of using same
US6288937B1 (en) 2000-05-10 2001-09-11 Lattice Semiconductor Corporation Decoded generic routing pool
US6545504B2 (en) 2001-06-01 2003-04-08 Macronix International Co., Ltd. Four state programmable interconnect device for bus line and I/O pad
US6577161B2 (en) 2001-06-01 2003-06-10 Macronix International Co., Ltd. One cell programmable switch using non-volatile cell with unidirectional and bidirectional states
US6531887B2 (en) 2001-06-01 2003-03-11 Macronix International Co., Ltd. One cell programmable switch using non-volatile cell
US20050102573A1 (en) * 2003-11-03 2005-05-12 Macronix International Co., Ltd. In-circuit configuration architecture for embedded configurable logic array
US20050097499A1 (en) * 2003-11-03 2005-05-05 Macronix International Co., Ltd. In-circuit configuration architecture with non-volatile configuration store for embedded configurable logic array
US20050093572A1 (en) * 2003-11-03 2005-05-05 Macronix International Co., Ltd. In-circuit configuration architecture with configuration on initialization function for embedded configurable logic array
US8320191B2 (en) 2007-08-30 2012-11-27 Infineon Technologies Ag Memory cell arrangement, method for controlling a memory cell, memory array and electronic device
US8610482B2 (en) * 2011-05-27 2013-12-17 Semiconductor Energy Laboratory Co., Ltd. Trimming circuit and method for driving trimming circuit

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5694585A (en) * 1979-12-27 1981-07-31 Mitsubishi Electric Corp Memory transistor circuit
US4387444A (en) * 1980-07-07 1983-06-07 Hughes Aircraft Company Non-volatile semiconductor memory cells
JPS6038799A (ja) * 1983-08-11 1985-02-28 Seiko Instr & Electronics Ltd 半導体不揮発性メモリ用読み出し回路
US4796229A (en) * 1986-07-08 1989-01-03 Texas Instruments Incorporated Writable logic array
FR2618579B1 (fr) * 1987-07-21 1989-11-10 Thomson Semiconducteurs Circuit integre a memoire comportant un dispositif anti-fraude
JP2785936B2 (ja) * 1988-04-12 1998-08-13 日本電気株式会社 冗長回路のテスト方法

Also Published As

Publication number Publication date
WO1992020067A1 (en) 1992-11-12
US5251169A (en) 1993-10-05
JPH06507039A (ja) 1994-08-04
EP0586473B1 (en) 1998-11-11
DE69227584D1 (de) 1998-12-17
EP0586473A1 (en) 1994-03-16
EP0586473A4 (enExample) 1994-08-03

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee