DE69214902D1 - Vektorregelschleife - Google Patents

Vektorregelschleife

Info

Publication number
DE69214902D1
DE69214902D1 DE69214902T DE69214902T DE69214902D1 DE 69214902 D1 DE69214902 D1 DE 69214902D1 DE 69214902 T DE69214902 T DE 69214902T DE 69214902 T DE69214902 T DE 69214902T DE 69214902 D1 DE69214902 D1 DE 69214902D1
Authority
DE
Germany
Prior art keywords
control loop
vector control
vector
loop
control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69214902T
Other languages
English (en)
Other versions
DE69214902T2 (de
Inventor
Marcus K Dasilva
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Agilent Technologies Inc
Original Assignee
Hewlett Packard Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hewlett Packard Co filed Critical Hewlett Packard Co
Application granted granted Critical
Publication of DE69214902D1 publication Critical patent/DE69214902D1/de
Publication of DE69214902T2 publication Critical patent/DE69214902T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/07—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop using several loops, e.g. for redundant clock signal generation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03C—MODULATION
    • H03C1/00—Amplitude modulation
    • H03C1/02—Details
    • H03C1/06—Modifications of modulator to reduce distortion, e.g. by feedback, and clearly applicable to more than one type of modulator
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D3/00—Demodulation of angle-, frequency- or phase- modulated oscillations
    • H03D3/02—Demodulation of angle-, frequency- or phase- modulated oscillations by detecting phase difference between two signals obtained from input signal
    • H03D3/24—Modifications of demodulators to reject or remove amplitude variations by means of locked-in oscillator circuits
    • H03D3/241—Modifications of demodulators to reject or remove amplitude variations by means of locked-in oscillator circuits the oscillator being part of a phase locked loop
    • H03D3/244—Modifications of demodulators to reject or remove amplitude variations by means of locked-in oscillator circuits the oscillator being part of a phase locked loop combined with means for obtaining automatic gain control
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3241—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits
    • H03F1/3247—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits using feedback acting on predistortion circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3241—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits
    • H03F1/3282—Acting on the phase and the amplitude of the input signal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/087—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using at least two phase detectors or a frequency and phase detector in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/438—Separate feedback of amplitude and phase signals being present
DE69214902T 1991-08-28 1992-08-12 Vektorregelschleife Expired - Fee Related DE69214902T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/751,458 US5105168A (en) 1991-08-28 1991-08-28 Vector locked loop

Publications (2)

Publication Number Publication Date
DE69214902D1 true DE69214902D1 (de) 1996-12-05
DE69214902T2 DE69214902T2 (de) 1997-02-27

Family

ID=25022057

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69214902T Expired - Fee Related DE69214902T2 (de) 1991-08-28 1992-08-12 Vektorregelschleife

Country Status (4)

Country Link
US (1) US5105168A (de)
EP (1) EP0529874B1 (de)
JP (1) JP3255984B2 (de)
DE (1) DE69214902T2 (de)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5329250A (en) * 1992-02-25 1994-07-12 Sanyo Electric Co., Ltd. Double phase locked loop circuit
GB9209982D0 (en) * 1992-05-08 1992-06-24 British Tech Group Method and apparatus for amplifying modulating and demodulating
US5317284A (en) * 1993-02-08 1994-05-31 Hughes Aircraft Company Wide band, low noise, fine step tuning, phase locked loop frequency synthesizer
GB9313981D0 (en) * 1993-07-06 1993-08-18 Plessey Semiconductors Ltd Wide-band microwave modulator arrangements
US5939951A (en) * 1995-05-25 1999-08-17 Btg International Limited Methods and apparatus for modulating, demodulating and amplifying
US5652548A (en) * 1995-06-07 1997-07-29 Cornell Research Foundation, Inc. PTM signal generator combining outputs of two same frequency oscillators
WO1997005721A1 (en) * 1995-07-28 1997-02-13 Airnet Communications Corporation Reducing peak-to-average variance of a composite transmitted signal via out-of-band artifact signaling
US5808517A (en) * 1996-12-10 1998-09-15 Cornell Research Foundation, Inc. PTM signal generator combining outputs of multiple oscillators
US5901346A (en) * 1996-12-11 1999-05-04 Motorola, Inc. Method and apparatus utilizing a compensated multiple output signal source
US6054896A (en) 1998-12-17 2000-04-25 Datum Telegraphic Inc. Controller and associated methods for a linc linear power amplifier
DE69901253T2 (de) * 1998-06-19 2002-11-21 Pmc Sierra Inc Schaltung und verfahren mit kompensation von fehlern in verstärkerketten in einem linc oder anderen verstärkereinrichtungen
US6313680B1 (en) * 2000-01-28 2001-11-06 Agere Systems Guardian Corp. Phase splitter
US6973145B1 (en) * 2000-09-01 2005-12-06 Ut-Battelle, Llc Digital-data receiver synchronization method and apparatus
GB2370435A (en) * 2000-12-22 2002-06-26 Nokia Mobile Phones Ltd A polar loop transmitter for a mobile phone
US7088968B2 (en) * 2001-12-12 2006-08-08 Intel Corporation Method and polar-loop transmitter with origin offset for zero-crossing signals
TW583853B (en) * 2002-08-16 2004-04-11 Realtek Semiconductor Corp Compensation method for synchronization of sampling frequency and carrier frequency in multi-carrier communication system and apparatus thereof
US6880350B2 (en) 2002-09-13 2005-04-19 Isothermal Systems Research, Inc. Dynamic spray system
US6857283B2 (en) 2002-09-13 2005-02-22 Isothermal Systems Research, Inc. Semiconductor burn-in thermal management system
US7260157B2 (en) 2002-11-21 2007-08-21 Sotoudeh Hamedi Hagh Phase shifted transmitter architecture for communication systems
US9325491B2 (en) * 2014-04-15 2016-04-26 Triquint Semiconductor, Inc. Clock generation circuit with dual phase-locked loops
CN110557118B (zh) * 2018-05-31 2022-12-27 华为技术有限公司 一种锁相装置及锁相方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3778728A (en) * 1972-04-11 1973-12-11 Edmac Ass Inc Phaselocked-fm detector apparatus
JPS6013555B2 (ja) * 1977-06-17 1985-04-08 ソニー株式会社 バ−スト信号のレベル検出回路
NL8001903A (nl) * 1980-04-01 1981-11-02 Philips Nv Inrichting voor het versterken van een gemoduleerd draaggolfsignaal.
US4884040A (en) * 1988-09-26 1989-11-28 Rca Licensing Corporation Sampled data phase locking system

Also Published As

Publication number Publication date
JP3255984B2 (ja) 2002-02-12
DE69214902T2 (de) 1997-02-27
EP0529874B1 (de) 1996-10-30
JPH05243985A (ja) 1993-09-21
US5105168A (en) 1992-04-14
EP0529874A1 (de) 1993-03-03

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: AGILENT TECHNOLOGIES, INC. (N.D.GES.D.STAATES DELA

8327 Change in the person/name/address of the patent owner

Owner name: AGILENT TECHNOLOGIES, INC. (N.D.GES.D. STAATES, US

8339 Ceased/non-payment of the annual fee