DE69213609T2 - Kompakte und fehlertolerante Schnittstelle und deren Verwendung in einer Mehrheitsentscheidungsvorrichtung - Google Patents

Kompakte und fehlertolerante Schnittstelle und deren Verwendung in einer Mehrheitsentscheidungsvorrichtung

Info

Publication number
DE69213609T2
DE69213609T2 DE69213609T DE69213609T DE69213609T2 DE 69213609 T2 DE69213609 T2 DE 69213609T2 DE 69213609 T DE69213609 T DE 69213609T DE 69213609 T DE69213609 T DE 69213609T DE 69213609 T2 DE69213609 T2 DE 69213609T2
Authority
DE
Germany
Prior art keywords
fault
compact
decision device
majority decision
tolerant interface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69213609T
Other languages
English (en)
Other versions
DE69213609D1 (de
Inventor
Serge Noraz
Michel Prunier
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Schneider Electric SE
Original Assignee
Schneider Electric SE
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Schneider Electric SE filed Critical Schneider Electric SE
Application granted granted Critical
Publication of DE69213609D1 publication Critical patent/DE69213609D1/de
Publication of DE69213609T2 publication Critical patent/DE69213609T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/18—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits
    • G06F11/187—Voting techniques
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0796—Safety measures, i.e. ensuring safe condition in the event of error, e.g. for controlling element
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/007—Fail-safe circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Human Computer Interaction (AREA)
  • Hardware Redundancy (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Power Sources (AREA)
  • Management, Administration, Business Operations System, And Electronic Commerce (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
DE69213609T 1991-07-29 1992-07-10 Kompakte und fehlertolerante Schnittstelle und deren Verwendung in einer Mehrheitsentscheidungsvorrichtung Expired - Lifetime DE69213609T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9109709A FR2680024B1 (fr) 1991-07-29 1991-07-29 Interface de securite compacte et module de vote la comportant.

Publications (2)

Publication Number Publication Date
DE69213609D1 DE69213609D1 (de) 1996-10-17
DE69213609T2 true DE69213609T2 (de) 1997-04-30

Family

ID=9415753

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69213609T Expired - Lifetime DE69213609T2 (de) 1991-07-29 1992-07-10 Kompakte und fehlertolerante Schnittstelle und deren Verwendung in einer Mehrheitsentscheidungsvorrichtung

Country Status (9)

Country Link
US (1) US5404497A (de)
EP (1) EP0526350B1 (de)
JP (1) JPH05204509A (de)
KR (1) KR100255056B1 (de)
CN (1) CN1043822C (de)
CA (1) CA2074145C (de)
DE (1) DE69213609T2 (de)
ES (1) ES2094328T3 (de)
FR (1) FR2680024B1 (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GR930100359A (en) * 1993-09-02 1995-05-31 Koloni Sofia & Sia E E Strongly fail safe interface based on concurrent checking.
US6087861A (en) * 1998-02-11 2000-07-11 International Business Machines Corporation Data network drivers including balanced current supplies and related methods
CN101594126B (zh) * 2008-05-30 2011-06-22 通嘉科技股份有限公司 相位恢复电路、周期信号产生器、电源管理电路及方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3824408A (en) * 1973-07-20 1974-07-16 Microsystems Int Ltd Driver circuit
US3900746A (en) * 1974-05-03 1975-08-19 Ibm Voltage level conversion circuit
DE2900631C2 (de) * 1979-01-09 1981-05-27 Siemens AG, 1000 Berlin und 8000 München Sicherheits-Ausgabeschaltung
US4283690A (en) * 1979-12-31 1981-08-11 Motorola, Inc. Low power CMOS oscillator
US4743782A (en) * 1984-11-09 1988-05-10 Honeywell Inc. GaAs level-shift logic interface circuit
GB2166918B (en) * 1984-11-13 1988-09-14 Westinghouse Brake & Signal A circuit arrangement for providing in a fail-safe manner an alternating output signal to a load
FR2643762B1 (fr) * 1989-02-27 1991-05-10 Merlin Gerin Systeme de codage en frequence a haute surete de fonctionnement
US5208553A (en) * 1991-04-05 1993-05-04 Q-Bit Corporation Multi-stage amplifier with shared directional coupler feedback
JPH06169237A (ja) * 1991-09-13 1994-06-14 Mitsubishi Electric Corp リングオシレータ回路

Also Published As

Publication number Publication date
CA2074145C (en) 2002-11-26
FR2680024A1 (fr) 1993-02-05
KR930002919A (ko) 1993-02-23
CN1069139A (zh) 1993-02-17
ES2094328T3 (es) 1997-01-16
CA2074145A1 (en) 1993-01-30
US5404497A (en) 1995-04-04
JPH05204509A (ja) 1993-08-13
EP0526350B1 (de) 1996-09-11
DE69213609D1 (de) 1996-10-17
CN1043822C (zh) 1999-06-23
KR100255056B1 (ko) 2000-05-01
FR2680024B1 (fr) 1993-10-22
EP0526350A1 (de) 1993-02-03

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