DE69131611D1 - Verfahren zur Herstellung dünner Schichten aus Oxyd-Supraleiter - Google Patents

Verfahren zur Herstellung dünner Schichten aus Oxyd-Supraleiter

Info

Publication number
DE69131611D1
DE69131611D1 DE69131611T DE69131611T DE69131611D1 DE 69131611 D1 DE69131611 D1 DE 69131611D1 DE 69131611 T DE69131611 T DE 69131611T DE 69131611 T DE69131611 T DE 69131611T DE 69131611 D1 DE69131611 D1 DE 69131611D1
Authority
DE
Germany
Prior art keywords
production
thin layers
oxide superconductors
superconductors
oxide
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69131611T
Other languages
English (en)
Other versions
DE69131611T2 (de
Inventor
Takashi Matsuura
Kenjiro Higaki
Hideo Itozaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Electric Industries Ltd
Original Assignee
Sumitomo Electric Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Industries Ltd filed Critical Sumitomo Electric Industries Ltd
Publication of DE69131611D1 publication Critical patent/DE69131611D1/de
Application granted granted Critical
Publication of DE69131611T2 publication Critical patent/DE69131611T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00—Superconducting devices
    • H10N60/01—Manufacture or treatment
    • H10N60/0268—Manufacture or treatment of devices comprising copper oxide
    • H10N60/0296—Processes for depositing or forming copper oxide superconductor layers
    • H10N60/0576—Processes for depositing or forming copper oxide superconductor layers characterised by the substrate
    • H10N60/0632—Intermediate layers, e.g. for growth control
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S505/00—Superconductor technology: apparatus, material, process
    • Y10S505/70—High TC, above 30 k, superconducting device, article, or structured stock
    • Y10S505/701—Coated or thin film device, i.e. active or passive
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S505/00—Superconductor technology: apparatus, material, process
    • Y10S505/70—High TC, above 30 k, superconducting device, article, or structured stock
    • Y10S505/701—Coated or thin film device, i.e. active or passive
    • Y10S505/702—Josephson junction present
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S505/00—Superconductor technology: apparatus, material, process
    • Y10S505/725—Process of making or treating high tc, above 30 k, superconducting shaped material, article, or device
    • Y10S505/73—Vacuum treating or coating
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S505/00—Superconductor technology: apparatus, material, process
    • Y10S505/725—Process of making or treating high tc, above 30 k, superconducting shaped material, article, or device
    • Y10S505/73—Vacuum treating or coating
    • Y10S505/731—Sputter coating

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Superconductors And Manufacturing Methods Therefor (AREA)
  • Inorganic Compounds Of Heavy Metals (AREA)
  • Superconductor Devices And Manufacturing Methods Thereof (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
DE69131611T 1990-06-28 1991-06-28 Verfahren zur Herstellung dünner Schichten aus Oxyd-Supraleiter Expired - Fee Related DE69131611T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17099390 1990-06-28

Publications (2)

Publication Number Publication Date
DE69131611D1 true DE69131611D1 (de) 1999-10-21
DE69131611T2 DE69131611T2 (de) 2000-04-06

Family

ID=15915128

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69131611T Expired - Fee Related DE69131611T2 (de) 1990-06-28 1991-06-28 Verfahren zur Herstellung dünner Schichten aus Oxyd-Supraleiter

Country Status (5)

Country Link
US (1) US5314870A (de)
EP (1) EP0465325B1 (de)
AU (1) AU637511B2 (de)
CA (1) CA2045890C (de)
DE (1) DE69131611T2 (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69112282T2 (de) * 1990-05-30 1996-05-02 Sumitomo Electric Industries Verfahren zur Herstellung Hochtemperatur supraleitender Dünnschichten.
JPH0455305A (ja) * 1990-06-20 1992-02-24 Sumitomo Electric Ind Ltd 超電導薄膜の作製方法
CA2045267C (en) * 1990-06-21 1998-12-08 Hideo Itozaki Process and apparatus for preparing superconducting thin films

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4880770A (en) * 1987-05-04 1989-11-14 Eastman Kodak Company Metalorganic deposition process for preparing superconducting oxide films
JPS6438917A (en) * 1987-08-05 1989-02-09 Fujikura Ltd Oxide superconductor
GB2213839B (en) * 1987-12-23 1992-06-17 Plessey Co Plc Semiconducting thin films
KR900017216A (ko) * 1988-04-30 1990-11-15 나까하라 쯔네오 초전도체 박막을 가지는 반도체 기판과 그 제조 방법
JP2797186B2 (ja) * 1988-05-06 1998-09-17 住友電気工業株式会社 超電導体層を有する半導体基板
DE69016283T3 (de) * 1989-06-30 1998-04-02 Sumitomo Electric Industries Substrat mit einer supraleitenden Schicht.
DE69112282T2 (de) * 1990-05-30 1996-05-02 Sumitomo Electric Industries Verfahren zur Herstellung Hochtemperatur supraleitender Dünnschichten.

Also Published As

Publication number Publication date
US5314870A (en) 1994-05-24
EP0465325B1 (de) 1999-09-15
CA2045890A1 (en) 1991-12-29
EP0465325A2 (de) 1992-01-08
CA2045890C (en) 1998-10-06
DE69131611T2 (de) 2000-04-06
AU637511B2 (en) 1993-05-27
AU7945391A (en) 1992-01-02
EP0465325A3 (en) 1992-04-15

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee