DE69131147D1 - Verfahren zur Simulation des Zustands eines Schieberegisters mit linearer Rückkopplung - Google Patents

Verfahren zur Simulation des Zustands eines Schieberegisters mit linearer Rückkopplung

Info

Publication number
DE69131147D1
DE69131147D1 DE69131147T DE69131147T DE69131147D1 DE 69131147 D1 DE69131147 D1 DE 69131147D1 DE 69131147 T DE69131147 T DE 69131147T DE 69131147 T DE69131147 T DE 69131147T DE 69131147 D1 DE69131147 D1 DE 69131147D1
Authority
DE
Germany
Prior art keywords
simulating
state
shift register
linear feedback
feedback
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69131147T
Other languages
English (en)
Other versions
DE69131147T2 (de
Inventor
Michael D Kotzin
Alan L Wilson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of DE69131147D1 publication Critical patent/DE69131147D1/de
Application granted granted Critical
Publication of DE69131147T2 publication Critical patent/DE69131147T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J13/00—Code division multiplex systems
    • H04J13/0007—Code type
    • H04J13/0022—PN, e.g. Kronecker
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/58—Random or pseudo-random number generators
    • G06F7/582—Pseudo-random number generators
    • G06F7/584—Pseudo-random number generators using finite field arithmetic, e.g. using a linear feedback shift register
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J13/00—Code division multiplex systems
    • H04J13/10—Code generation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/58—Indexing scheme relating to groups G06F7/58 - G06F7/588
    • G06F2207/581—Generating an LFSR sequence, e.g. an m-sequence; sequence may be generated without LFSR, e.g. using Galois Field arithmetic
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/58—Indexing scheme relating to groups G06F7/58 - G06F7/588
    • G06F2207/583—Serial finite field implementation, i.e. serial implementation of finite field arithmetic, generating one new bit or trit per step, e.g. using an LFSR or several independent LFSRs; also includes PRNGs with parallel operation between LFSR and outputs

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Shift Register Type Memory (AREA)
DE69131147T 1990-07-19 1991-07-16 Verfahren zur Simulation des Zustands eines Schieberegisters mit linearer Rückkopplung Expired - Fee Related DE69131147T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/554,510 US5073909A (en) 1990-07-19 1990-07-19 Method of simulating the state of a linear feedback shift register

Publications (2)

Publication Number Publication Date
DE69131147D1 true DE69131147D1 (de) 1999-05-27
DE69131147T2 DE69131147T2 (de) 1999-11-11

Family

ID=24213643

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69131147T Expired - Fee Related DE69131147T2 (de) 1990-07-19 1991-07-16 Verfahren zur Simulation des Zustands eines Schieberegisters mit linearer Rückkopplung

Country Status (4)

Country Link
US (1) US5073909A (de)
EP (1) EP0467640B1 (de)
JP (1) JP3039023B2 (de)
DE (1) DE69131147T2 (de)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB9417270D0 (en) * 1994-08-26 1994-10-19 Inmos Ltd Timing circuit
WO1996036137A2 (en) * 1995-05-12 1996-11-14 Philips Electronics N.V. A direct-sequence spread spectrum communication system, a primary radio station, and a secondary radio station
GB2304941B (en) * 1995-06-24 1999-09-08 Motorola Ltd Feedback and shift unit
US5946473A (en) * 1997-06-17 1999-08-31 International Business Machines Corporation LFSR implementation using split-table lookup
US6097889A (en) * 1997-06-23 2000-08-01 Motorola, Inc. Signal processing apparatus with stages in a signal path operating as LFSR of alternable type and method for processing signals
US6956672B1 (en) 2001-04-05 2005-10-18 Lexmark International, Inc. Method for mixing inks for high fidelity color printing
US7668893B2 (en) * 2005-08-30 2010-02-23 Micron Technology, Inc. Data generator having linear feedback shift registers for generating data pattern in forward and reverse orders
US8817928B2 (en) * 2010-06-01 2014-08-26 Ternarylogic Llc Method and apparatus for rapid synchronization of shift register related symbol sequences
US10375252B2 (en) 2010-06-01 2019-08-06 Ternarylogic Llc Method and apparatus for wirelessly activating a remote mechanism
US8923417B1 (en) * 2012-01-12 2014-12-30 Altera Corporation Methods and apparatus for transceiver power noise reduction
DE102012205620B4 (de) * 2012-04-05 2015-04-16 Infineon Technologies Ag Pseudozufallszahlengenerator und verfahren zur bereitstellung einer pseudozufallsfolge
US10708043B2 (en) 2013-03-07 2020-07-07 David Mayer Hutchinson One pad communications
DE102013206430A1 (de) * 2013-04-11 2014-10-16 Siemens Aktiengesellschaft Multifunktionale Schieberegister
US12056549B1 (en) 2015-06-28 2024-08-06 Lcip Jv Method and apparatus for activating a remote device

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CH435363A (de) * 1965-11-26 1967-05-15 Patelhold Patentverwertung Einrichtung zur Synchronisierung von Impulsgeneratoren
BE791651A (fr) * 1971-11-22 1973-03-16 Rca Corp Circuits logiques a vitesse elevee
US4531022A (en) * 1983-01-13 1985-07-23 International Standard Electric Corporation Device for generating binary digit pseudo-random sequences
GB8626517D0 (en) * 1986-11-06 1986-12-10 Int Computers Ltd Testing programmable logic arrays

Also Published As

Publication number Publication date
JPH04229495A (ja) 1992-08-18
JP3039023B2 (ja) 2000-05-08
EP0467640A3 (en) 1993-03-17
EP0467640B1 (de) 1999-04-21
EP0467640A2 (de) 1992-01-22
US5073909A (en) 1991-12-17
DE69131147T2 (de) 1999-11-11

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee