DE69127361T2 - DEVICE AND METHOD FOR REDUCING DISTORTION IN AMPLIFIERS - Google Patents

Abstract

Broadband amplifiers which are intended to be linear suffer from distortion and although many techniques have been devised to overcome this problem significant improvements are required especially at frequencies above 100 MHz. An error signal is formed from the output of the amplifier 4 by comparison in a subtractor 11 with its input and the error signal is combined in a coupler 17 with the amplifier output to reduce distortion. The present invention provides automatic amplitude and phase control of the signals forming the error signal by means of components 24 and 25 in a multi-channel input and in the error signal by means of components 13 and 14. These components receive control signals from feedback networks 18' and 20' which each process two of three input signals from: couplers 34, 36 before the subtractor 11, a coupler 22 which passes the error signal and a coupler 21 after the coupler 17. Preferably the two input signals used by a feedback network are used to form in-phase and quadrature signals by a 90 DEG phase shifter 41 and mixers 42 and 43. These signals are each amplified 46, 47 and integrated 48, 49 to provide the control signals. The input signals from the feedback networks may be reduced in frequency and applied to a DSP which then provides the control signals. <IMAGE>

Description

The present invention relates to the reduction of distortion in amplifiers and, more particularly, to the use of a real-time feedback technique in a feedback correction loop to reduce distortion in high-performance, broadband linear amplifiers.

All linear amplifiers distort to some extent the signals they are intended to amplify, and this is particularly undesirable when two or more independent channels are being amplified. Under these circumstances, undesirable intermodulation products are generated which can cause interference and result in poor functioning of the system on which they are based. For this reason, these distortion products must be kept below certain predefined levels, and several methods have been proposed to perform this function.

Based on the well-known audio amplifier theory, various feedback methods have been developed to eliminate distortion. These have generally focused on the areas of signal feedback operating at the final output frequency of the amplifier and modulation feedback operating at the baseband input frequency of the entire transmitter. These two methods suffer from two common problems, namely instability at high values of feedback loop gain and poor broadband performance. As a result, these methods have generally been limited to narrowband amplifiers operating on a single channel.

Predistortion techniques have been proposed to eliminate the instability problem inherent in feedback systems by adaptively changing the amplitude and phase weights of the predistortion signals, but these techniques do not operate in real time. The updating process must be performed frequently enough to compensate for parameter drift in the amplifier, but infrequently enough to avoid instability. Such techniques usually have the disadvantage of requiring large memory capacities to store the various predistortion parameters and a require an appropriate level of processing power to update them.

Feedforward techniques overcome all of the above problems because they rely on the generation of a time-delayed error signal that cancels the intermodulation products when added to the linearly amplified signal. The degree of cancellation of these distortion products depends critically on the accuracy of the gain and phase adjustment of the error signal. These signals must be constantly adjusted to maintain the amplifier's performance at its highest level. In U.S. Patent No. 4,580,105, such adjustments are achieved by injecting a pilot signal that is extracted after one pass through the amplifier and used to control the gain and phase of the error signal.

British Patent Specification 2 107 540B describes a feed forward amplifier in which an error signal is obtained by comparing the output of the amplifier with its input signal to derive an error signal which is combined with the output of the amplifier. Two compensation circuits are used, one for the signals used in the comparison and one for the error signal. The amplitude and phase of the output of the compensation circuits are automatically controlled by two signals which control the gain of two parallel broadband amplifiers in the compensation circuits. As a whole this parallel arrangement provides the required compensation. The arrangement is difficult to build and operate because the two broadband amplifiers must be very similar and the circuits deriving their control signals must be carefully controlled if any useful compensation is to be obtained. This is difficult at any frequency, but particularly difficult at frequencies above 100 MHz The gain versus frequency characteristics of the two amplifiers must closely follow each other because any discrepancy will result in cancellation of the unwanted error signal components (or final output distortion) being achieved only at a single frequency or over a narrow bandwidth. The overall flatness of the frequency response (both in gain and phase) of the combined amplifiers must also be be good, in the same way that the frequency response of the main error amplifier must be flat, and this is an additional and undesirable system constraint. The above patent is mentioned in British Patent Specification 2 167 256A, where it is cited as the only example of phase and amplitude control. The suggestion that respective amplitude and phase control be provided does not appear to appear in these documents. US Patent 4 885 551 describes an arrangement which also uses amplitude and phase compensation circuits and in which gain and phase control is provided by a programmed controller which adjusts gain and phase alternately. The arrangement described does not provide signals which are separately dependent on phase and gain, so that the gain and phase adjustments are not independent. By using successive signals, phase and gain adjustments also become relatively long and are not suitable for many applications.

According to a first aspect of the present invention, an apparatus for reducing the distortion generated by an amplifier is provided with

an error signal generating means for connection to the input and output of an amplifier for deriving an error signal dependent on the output of the amplifier and input signals supplied to the amplifier which is required to provide undistorted output signals,

a correction means for cancelling the distortion in the output signals of the amplifier by using the error signal to provide a corrected signal,

wherein the error signal generating means comprises serially connected, independently acting first amplitude adjusting means and second phase adjusting means for automatically adjusting the amplitude or phase of at least one of the following signals,

the error signal, or

a signal used in generating the error signal, or a signal used in providing the corrected signal,

in response to respective first and second simultaneously derived control signals to provide improved cancellation of the distortion, and

a control means for generating the first and second control signals from at least two signals, one of which is dependent on the input signals or signals derived therefrom.

According to a second aspect of the present invention, there is provided a method for reducing the distortion produced by an amplifier comprising the steps of

Deriving an error signal that depends on the output signals of the amplifier and input signals fed to the amplifier, which is required to provide undistorted output signals,

Canceling the distortion produced by the amplifier, using the error signal to provide a corrected signal,

automatically making separate amplitude adjustments and phase adjustments in sequence on at least one of

the error signal, or

a signal used in generating the error signal or

a signal used in providing the corrected signal,

in response to respective simultaneously derived first and second control signals to provide substantially improved cancellation of the distortion, and

Generating the control signals from at least two signals, one of which is dependent on the input signals or signals derived therefrom.

By providing independently acting adjustments for amplitude and phase control responsive to simultaneously derived control signals, the present invention helps to overcome the problems of temperature, ageing and speed of operation mentioned above in connection with GB Patent Specifications 2 107 540B and 2 167 256A and US Patent 4 885 551 and allows Fast setting, suitable for broadband amplifiers operating above 100 MHz, for example.

Several real-time self-control techniques are described in this patent which operate to optimize the gain and phase settings in both an error-determining loop and an error-cancelling loop of an amplifier utilizing feedforward distortion correction. The described techniques cover both narrowband and wideband correction utilizing both single and multiple input channels and error-determining loops.

Several different forms of control system are described, including energy minimization techniques and search techniques for in-phase-out-of-phase (I-Q) zero crossings. The control systems described can be applied to both the error determining loop and the error cancellation loop.

Certain embodiments of the invention will now be described by way of example with reference to the accompanying drawings, in which:

Figure 1 is a block diagram of an embodiment of the invention showing a feedforward amplifier system with feedback optimization,

Figure 2 is a block diagram of another embodiment of the invention showing a feedforward amplifier system with real-time feedback parameter adjustment,

Figure 3 shows simplified spectra at different locations in Figure 2 during operation,

Figure 4 is a modified version of the arrangement of Figure 2 ,

Figures 5 and 6 are block diagrams of embodiments using offset frequency techniques and a digital signal processor, and

Figure 7 is a block diagram of an embodiment in which polar coordinate control signals are derived for parameter adjustment.

In Figure 1, an input signal at a terminal 1 is divided by a divider 2 between two paths: a main path 3 to a main amplifier 4 and a secondary path 5 to phase and gain adjustment components 6 and 7. The output signal from the main amplifier 4 contains distortion products in the form of intermodulation. A sample of the main amplifier output is obtained through the directional coupler 9 and fed to a combiner 11. The other input to the combiner 11 is arranged to be in antiphase with the sampled power amplifier output (thus forming a subtractor) by correct selection of a time delay element 8 and correct setting of the phase shift component 6. For optimum cancellation of the input signal this is not sufficient because the amplitude levels must also be equal and this is arranged by correct setting of the variable gain component 7. The signal obtained from the output of the subtractor 11 contains in theory only the distortion products and forms an error signal.

By means similar to those described above, the error signal is used to cancel the distortion products present in the output of the main amplifier 4. In this case, the main amplifier signal, having passed through the "pass-through" of the directional coupler 9, is delayed by a time delay element 16 and fed to one input of a directional coupler 17 which acts as a subtractor. The other input of the directional coupler 17 is obtained by processing the error signal previously derived from the combiner 11 (acting as a subtractor) using a time delay element 12, phase and gain adjustment components 13 and 14 and an error amplifier 15. The variable gain and phase shift components 13 and 14 are adjusted for maximum cancellation of the unwanted distortion products present in the output signal of the coupler 17 and also take into account phase and amplitude errors in the amplifier 15.

The reference signal in path 5 is adjusted in phase and amplitude by the variable phase shift and variable gain components 6 and 7 to compensate for the specific gain and phase anomalies of the power amplifier 4 at the frequency of interest. The gain and phase weighted reference signal is then time delayed to form the input to the adder 11.

Automatic adjustment of the phase shift and gain components 6 and 7 is achieved as follows. A sample of the error signal is obtained through a directional coupler 10 after a subtractor 11 and forms an input to a feedback network 18. A sample of the reference signal is obtained using a directional coupler 19 and forms the second signal feed to the feedback network 18. Appropriate processing of these two signals as described below yields two control signals for the variable phase and gain components 6 and 7.

The variable phase and gain components 13 and 14 are controlled by a further feedback network 20. The inputs to this control network come from a directional coupler 21 after the time delay element 16 and from a directional coupler 22 after the error amplifier 15. Appropriate processing of these two signals yields the necessary control signals for the phase and amplitude adjustment components 13 and 14.

The positions of the directional couplers 10, 19, 21 and 22 can be changed to positions where the same information can be obtained. For example, the coupler 19 can be placed after the time delay element 8, and the coupler 22 can be placed before the amplifier 15, the gain adjustment component 14, the phase adjustment component 13 or the time delay element 12.

The techniques described in this patent are applicable to both single and multiple input signal operation. Figure 1 shows a single channel correction system, with the correction taking place in the error determining loop in the reference signal path. One correction may be applied in the main amplifier path before the main amplifier, and multiple corrections may also be used to overcome or eliminate frequency dependent characteristics of the amplifier. The invention includes all such configurations.

Figure 2 shows in more detail another similar preferred embodiment of the invention in which phase and amplitude correction is carried out in the main signal path. Components having the same function in Figure 2 as in Figure 1, have the same designations, and locations where spectra shown in Figures 3(a) to (g) appear are indicated by letters (a) to (g) in Figure 2.

The input in Figure 2 is in the form of a plurality of input signals, each in its own channel, which may, for example, be one of a plurality of channels, such as about 100 cellular telephone channels. Such signals may then be amplified in a single broadband amplifier 4 and used for a common antenna (not shown). The spectra of three of n input signals are shown in Figures 3(a), (b) and (c). The input signals are each split into two paths by dividers 23, one path forming an input to a reference path combiner 26 and the other, after phase and gain adjustment, forming part of the input to the main power amplifier 4. Each of the input signals is independently adjusted in phase and amplitude by sets of variable phase shift and variable gain components 24 and 25 to compensate for the particular gain and phase anomalies of the power amplifier 4 at the individual frequencies of each signal. The gain and phase adjusted input signals are then added at a combiner 28 to form the input to the main power amplifier 4. The output spectrum of the amplifier 4 is shown in Figure 3(d) and contains frequency components below the frequency f1 and above the frequency fn. These components represent the distortion induced in the amplifier 4 and depend on the number of frequencies fn and their spacing in the frequency spectrum. They are shown in simplified form in Figures 3d and 3e for illustrative purposes only. Subtracting the error signal from the amplifier output at the coupler 17 yields the output signal spectrum of Figure 3 (e).

An error signal is derived from the adder 11 in the same manner as described above for Figure 1, except that the phase and gain adjustment components 6 and 7 in the reference path are replaced by the group of components 24 and 25 in the input path to the main amplifier. In addition, the control signals for phase and amplitude components are taken from different locations. The error signal has the spectrum Figure 3(f) with the input signal components at a very low level.

Automatic adjustment of a pair of phase and gain adjustment components 32 and 33 in groups 24 and 25 is achieved as follows. A sample of the error signal is obtained by directional coupler 22 and forms an input to each of two 90° phase shift mixers 42 and 43 via a divider 40 (two such mixers and circuits coupled thereto are required for each input signal, only one pair being shown in Figure 2). A sample of the first input signal is obtained using directional coupler 34 and fed through a divider 35 to mixer 43 and a 90° phase shift circuit 41. The output of circuit 35 provides an input to mixer 42. Similarly, couplers in a group 36 provide signals to the other pairs of mixers, quaver-phase circuits and subsequent circuits.

The network in Figure 2 is designated 18' to indicate that it has the same function as the feedback network 18 of Figure 1, except that it provides a control signal which allows the phase and amplitude of the frequency of each of the channel input signals to be individually adjusted for proper cancellation in the adder 11 to provide a suppressed error signal. In Figure 1, one input signal to the network 18 is the reference signal and the other is the error signal, but in Figure 2, one group of the input signals to the network 18' is the main amplifier input signal and the other is the error signal after amplification by the amplifier 15 (and phase and amplitude correction by its associated components 13 and 14). Both networks 18 and 18' thus use input signals which contain the input signals of the amplifier (in the main or reference path) and the error signal.

By using the channel input signals to identify the unwanted components of the error signal (i.e. the frequencies f₁ to fn (Figure 3(f)) of the channel input signals in Figure 2), the networks 18 and 18' are able to provide the required control signals. In Figure 2, the input signals from the set of couplers 36 can be viewed as being used (in the mixer) to control the frequencies of the channel input signals in the error signal from the coupler 22. Two ways in which this is achieved will now be described with reference to Figure 2, firstly by an in-phase (I) and quadrature (Q) method and secondly by an energy minimization method.

The DC component of the output signal of a balanced mixer or a phase detector such as a diode ring modulator passes through zero when the mixer's input signals are 90° out of phase. The magnitude of the DC component depends on the amplitudes and relative phase of the input signals, and the relative phase determines the sign of the DC component. The outputs of mixers 42 and 43 represent simultaneous independent Q and I signals, and their DC components (see Figure 3(g)) are selected by low-pass filters 44 and 45. When these two DC components are at zero, the input signals f1 through fn are eliminated from the error signal.

Because these output signals are part of an auxiliary loop that controls the phase and amplitude adjustment components 32 and 33, the Q and I DC components change in magnitude as adjustments take place. These changing DC components are applied to amplifiers 46 and 47, and when the outputs of these amplifiers are both zero, the phase and amplitude of the error signal is correct for complete cancellation of the channel input signals from the error signal. As the outputs of the amplifiers become positive or negative under changing conditions, the phases and amplitudes of the channel input signals are corrected for complete cancellation using the error signals applied to the adjustment components 31 and 32.

Since the outputs of the amplifiers only provide the sense (direction) of the required control signals, subsequent integration is necessary using components 48 and 49. These sum the amplifier outputs over time to obtain the correct control voltage levels. The control signals for the phase and gain adjustment components 32 and 33 are then formed by the outputs of integrators 48 and 49. As shown, integrator 48 is connected to component 32 and integrator 49 is connected to component 33, but depending on the phase relationships at the input to the network 18' due to delays in the circuits and connections, the integrator 48 could be connected to the component 33 and the integrator 49 to the component 32. A selection of these connections can be made empirically or the connections shown in Figure 2 can be made as shown but manually adjustable delays can be inserted and adjusted at the input to the network 18' to properly form the circuit function.

It can be shown that the control signals from the integrators 48 and 49 are independent of each other in that a change in one signal is not accompanied by a significant change in the other, provided one or both of the errors in the amplitude and phase of the respective input signals to the combiner 28 are small.

Other phase and gain adjustment components in the groups 24 and 25 are similarly controlled with respective signals from the group coupler 36 which are used as inputs to the other pair of mixers mentioned above. The divider 40 provides the other inputs to these pairs of mixers.

The network 18 of Figure 1 may use the same method, but in single channel form.

To represent amplitude and phase, the I and Q signals can be converted by a rectangular coordinate conversion to polar coordinates to provide polar coordinates (i.e. signals and I² + Q² and Tan⊃min;¹ Q/I are derived). The gain and phase adjustment components are then controlled by the "radius" and "angle" polar signals, respectively.

Similar methods can be used in a feedback network 20' and (without the divider 40) in the feedback network 20. Here the task is to adjust the amplitude of the error signal indicating that distortion in the coupler 17 is the same as in the signal from the amplifier 4, but is in antiphase so that subtraction and cancellation takes place. Two inputs from divider 40 are connected to mixers (not shown) in the network 20', one via a 90° phase shift (not shown). Outputs from integrators (not shown) are converted to phase and Amplitude adjustment components 13 and 14. Only one I and one Q signal are derived, and only one phase and one amplitude adjustment component are used.

The above-mentioned energy minimization method is put into practice by two changes to Figure 2. First, the mixers 42 and 43 are of a type in which the DC component of its output signal is minimized when its input signals are 90° out of phase, the direction of change in the output signal being determined by the phase. Second, the amplifier circuits 46 and 47 are replaced by respective differentiators (not shown). Since the outputs of the mixer are at a minimum when the phase and amplitude components 32 and 33 are correctly adjusted, differentiation is required to determine the direction of change, requiring, as before, integration which provides the respective control signals for the components 32 and 33.

Energy minimization as described above can also be used for the feedback circuit 20' using the above-mentioned inputs and in a single channel version for the network 20. Other known energy minimization techniques are also suitable, e.g. the use of a diode detector.

The phase adjustment required for wideband signals in the amplifier 4 may be more than 360º over the whole band and therefore the phase adjustment components 6 and 13 and in the group 24 may be formed by a combination of switched delay elements equivalent to a 360º delay or more and phase delay elements with a phase change of up to 360º.

Because the purpose of the feedback network 20' is to ensure the correct amplitude and phase of the error signal, one problem that can arise in the arrangement of Figure 2 is that the frequencies f₁ to fn in the output signal from the coupler 17 have such a high magnitude in the input from the coupler 21 to the feedback network 20' that the small remaining components at these frequencies are detected instead of distortion components. This results in control signals for the phase and amplitude components 13 and 14 that correspond to the desired signals and not to the error signal (ie, the distortion components). This problem is overcome in a preferred modification of Figure 2 shown in Figure 4. Here, a directional coupler 50 selects frequencies f₁ to fn from the output of combiner 26 and applies them, through a divider 56, an amplifier 51, a delay circuit 52, a phase adjustment component 53 and an amplitude adjustment component 54, to a combiner 55 arranged to subtract signals derived from coupler 50 from those derived from coupler 21. In this way, the magnitudes of frequencies f₁ to fn in the output of combiner 55 used for feedback network 20' are reduced such that detection of these signals substantially does not occur. A further feedback network 59, which may have the same form as the feedback network 18', is used to control the phase and amplitude adjustment components 53 and 54. The input signals for this feedback network are taken from the divider 56 and through a divider 58 from a coupler 57 respectively. However, as an alternative, a reference signal should be taken at some point between the combiner 26 and the amplifier 51 or the delay element 8. As a further alternative, a separate group of components corresponding to components 51 to 54 and the feedback network 59 may be provided for each input channel, with a reference signal for the feedback network being taken from each channel between respective ones of the dividers 23 and the coupler 36, the other input being taken from the coupler 57 through dividers corresponding to the divider 58, one of each for each channel. Another combiner is coupled to the outputs of the groups, and the combined outputs are connected to combiner 55.

The filters 44 and 45, the amplifiers 46 and 47, the integrators 48 and 49 and any differentiators used in the energy minimization process may be implemented in the form of a programmed circuit with an integrated digital signal processor (DSP). The programming of the DSPs is described in the book "Digital Signal Processing Design" by Andrew Bateman and Warren Yates, published by Pitman, London, 1988. Those parts of Figures 2 and 4, which illustrate circuits 44 to 49, can be considered equivalent to a flow chart for processing signals from mixers 42 and 43, because these signals are first filtered, then amplified, and then integrated. Programming a DSP to perform these functions is routine to those skilled in the art. Chapter 4 of the above-mentioned book describes how filters can be implemented; amplification is accomplished by multiplication, as described on pages 18 to 20 and 96 to 97 of the book, and integration is simply summation and is a well-known process in any microprocessor application.

One of the problems encountered in designing circuits to linearize wideband amplifiers is that these circuits must operate precisely to eliminate distortion, and problems arise with temperature and aging. DSPs do not suffer from such problems because they operate digitally, and it is therefore advantageous to replace as many of the circuits of Figures 1, 2, and 4 as possible with a DSP. However, unwanted DC components can arise from deficiencies in the mixers and in the A/D converters in the DSP circuits. Such unwanted components can be virtually eliminated by ensuring that the DSP input signals are at an audio frequency that allows mixing to be performed in software without introducing unwanted DC components. For real-time operation, input frequencies for DSPs should also preferably be no higher than 5 kHz, although future advances in DSP technology will likely enable higher frequencies to be used. With this in mind, any of the feedback networks 18, 18', 20, 20' and 56 can be replaced by the circuit of Figure 5, although a DSP 60 (shown in Figure 5) can be multiplexed to operate for more than one, or even all, of the networks in an amplifier correction circuit. In addition, the DSP 60 can be multiplexed to operate for several of the networks 18' corresponding to different input channels. In practice, it is better to use several DSPs, each of which acts as, for example, three of the feedback networks.

The purpose of the circuit of Figure 5 is to reduce the frequencies of the input signals to the DSP to be below about 1 kHz. Taking the circuit 18' of Figures 2 and 4 as an example, the connection from coupler 34 is shown at 61 and the two inputs from divider 40, which are identical and can therefore be transmitted by a single connection, are shown at 62. These signals may be in the bandwidth 860 to 900 MHz and the frequency of a particular channel in this bandwidth is designated gc. Mixers 63 and 64 receive signals from respective oscillators 65 and 66 at frequencies g1 and g2 which differ by about 1 kHz. The lower sidebands of mixers 63 and 64 are selected by filters 66 and 68 such that their output frequencies for a single channel are (gc-g1) and (gc-g2). If a signal at 61 is considered a reference input and that at 62 is considered an error signal, then the error is passed through mixers 63 and filter 67 to a mixer 70 whose output, having frequency (g1-g2), also carries the error signal. A reference signal, also at frequency (g1-g2), is obtained by mixing the outputs of oscillators 65 and 66 in a mixer 72. The two signals at frequency (g1 - g2) are selected by filters 73 and 74 and applied to the DSP 60 which may be programmed to perform the functions of the boxes shown in the network 18'. As mentioned above, DSP programming is routine to those skilled in the art and reference has been made to the book by Bateman and Yates. This book also has a section 6.3 on processing a quadrature signal and a section 6.5 on modulation techniques which cover suitable techniques for the mixers 42 and 43 and the quadrature 41.

Examples of subroutines (a) to (f) for a type TMS 320C25, which can be used as the DSP 60, are now given. The subroutines are given in assembly language, with the first column containing instructions and the second one or two operands separated by commas. The subroutines use mnemonics given in the manuals for this DSP type, and signals have self-explanatory mnemonics. In subroutine (b) a A phase shift of 90º in one path may be accompanied by a delay in the other path.

a) Inputting reference and error signals from ADCs

IN REFSIG, PA0 *Enter reference signal

IN ERSIG, PA1 *Enter error signal

b) Apply a 90º phase shift to the reference signal using a Hilbert transform filter and a delay

LRLK AR1, HDEL1 *Point to filter delay start

LAC REFSIG *Load reference input

SACL * *Enter in filter delay line

MPYK 0 *Clear P-Register

PAC *Delete accumulator

LRLK AR1, HDEL11 *Point to filter delay end

RPTK NHDEL-1 *Set repeat counter

MACD HCOF11,*- *Multiply accumulations (engl. accumulates)

APAC *Accumulate final product

SACH REF90,1 *Secure Hilbert filter result

LRLK AR1,HDEL6 *Point to filter delay center

LAC * *Extract signal

SACL REF0 *Safe as delayed signal

c) Mixing the error signal with I,O versions of the reference signals

LT ERSIG *Get error signal in T-Reg.

MPY REF0 *Multiply by I reference

PAC *Get product in accumulator

SACH MIX1,1 *Safe mixing result

MPY REF90 *Multiply by Q reference

PAC *Get product in accumulator

SACH MIX2,1 *Safe mixing result

d) Deep filtering of the mixer result

LRLK AR1,L1DL1 *Point to filter delay start

LAC MIX1 *Load mixer result

SACL * *Enter in filter delay line

MPYK 0 *Clear P-Register

PAC *Delete accumulator

LRLK AR1,L1DL21 *Point to filter delay end

RPTK NLPDL-1 *Set repeat counter

MACD LCOF21,*- *Multiply accumulators

APAC *Accumulate final product

SACH L1RES,1 *Safe low-pass result

e) Scaling the low-pass result and integrating

LT K *Integrator constant in T

MPY L1RES *Scale low pass result

PAC *Get product in accumulator

ADDH INT1 *Add in integrator contents

SACH INT1 *Save new result

SACH CNTRL1 *Secure as standard output

f) Output of control voltages to DACs

OUT CNFRL1,PA0 *Output to DAC1

OUT CNTRL2,PA1 *Output to DAC2

Because Figure 5 shifts the operating frequencies from the bandwidth of the amplifier 4 to a bandwidth suitable for operation by a DSP, the method is known as offset frequency digital control. Incidentally, the frequencies (gc-g1), (gc-g2) and (g₁-g₂) are intermediate frequencies that can be selected over a very wide range to suit available mixers and low-pass filters. A typical The range for an amplifier operating at 900 MHz is between 100 and 800 MHz.

In Figure 6 an alternative offset digital controller is shown, where for the example of network 18' signals from the coupler 34 appear at a connection 75 and signals from the divider 40 appear at a connection 76. After passing through an amplifier 77 the signal at connection 76, which can be considered an error signal, is applied to a circuit 78 whose outputs are 90° out of phase with each other. These outputs are applied to mixers 80 and 81 which receive respective 90° out of phase signals from an offset generator 82. Thus two signals separated by 90° appear at the frequency gc+g0 at the output of a combining circuit 83 where g0 is the frequency of the oscillator 82 and is suitable for DSP processing at about 1 kHz. A phase shift circuit 85 provides the necessary phase difference for signals applied from the oscillator 82 to the circuits 80 and 81.

The signal at connection 75, which may be considered a reference signal, is applied to a circuit 86 having two outputs separated by 90° in phase which are used for mixers 87 and 88 respectively which also receive signals from a divider circuit 89 connected to the output of combining circuit 83. As a result, the outputs of mixers 87 and 88 are both at frequency g₀ but separated in phase by 90°. These signals are selected by filters 90 and 91 and form I and Q signals for a DSP 60' which is the same as DSP 60 except that there are no processing steps equivalent to the components 35, 41, 42 and 43 shown in network 18'.

In another embodiment of the invention, phase and amplitude control signals can be provided directly by the circuit shown in Figure 7, which can therefore be used for any or all of the feedback networks of Figures 1, 2 and 4. Again taking circuit 18' as an example, the signal from coupler 34 appears on connection 93 and can be considered a reference signal, and the signal from divider 40 appears on connection 94 and may be considered as an error signal. The connection 94 is connected by means of an amplitude limiter 95 to a mixer 96 which acts as a phase detector and has its other input coupled to the connection 93. Thus a phase error signal appears at the output of the detector 96 and is in this example connected to the phase adjustment component 32. To obtain an amplitude error signal a coherence detector 97 is used which must receive in-phase signals. This is achieved by coupling a variable phase shift circuit 98 between the connection 94 and the detector 97 and automatically controlling the phase shift of the circuit 98 using an arrangement which locks its output 90° out of phase with the reference signal on the connection 93 and then the necessary in-phase relationship for the coherence detector is provided by a 90° phase shift circuit 99. Control for the phase shift circuit 98 is derived from a phase detector 101 which receives signals from the output of the phase shift circuit 98 and the connection 93. Low frequencies from the detector 101 are selected by a filter 102 and applied as a control signal to the variable phase shift circuit 98. Thus, if the output of the circuit 98 and signals on the connection 93 are not 90° out of phase, the phase shift applied by the circuit 98 is adjusted until a 90° phase shift is achieved. The output signal of the detector 97 is proportional to the amplitude error and is coupled in this example to control the amplitude adjustment component 33. As an alternative, a loop filter 102 can be replaced by an amplifier in parallel with an integration circuit, creating a proportional plus integral controller for the variable phase shift circuit 98.

Phase adjustment components shown in the figures can be constructed using a 90º phase shift hybrid circuit, with two ports connected to capacitance diodes (i.e. diodes whose capacitance changes with the applied bias voltage). In this context, a 90º phase shift hybrid circuit can be considered as having a first port to which an input signal is applied, respective second and third ports to which the capacitance diodes are connected, and a fourth port which provides the output for the circuit. Signals at the second and third ports are 90º out of phase, and varying the final capacitance of these ports provides a phase shift between the first and fourth ports. The amplitude adjustment components mentioned in this patent can also be constructed using a 90º phase shift hybrid circuit, but in this case the capacitance diodes are replaced by PIN diodes. In both cases, the control signals are applied as bias signals for the capacitance or PIN diodes, respectively.

It will be appreciated that the invention may be put into practice in many ways other than those specifically described.

Broadband amplification can be achieved using a single input and single or multiple error-determining loops, the latter deriving separate input signals to the network 18 or using equivalent low-pass filters.

Another implementation could be described as a feedforward "transmitter" where individual input signals are at baseband (audio frequency). These signals are then converted to high frequency before amplification. In such a transmitter, the locations from which signals are taken for at least some of the feedback networks to derive control signals for amplitude and phase control may be different from those shown in the figures. Some may be derived from the audio input signals be derived.

Claims (26)

1. Device for reducing the distortion produced by an amplifier with an error signal generating means for connection to the input and output of an amplifier for deriving an error signal dependent on the output of the amplifier and input signals supplied to the amplifier required to provide undistorted output signals, a correction means for cancelling the distortion in the output signals of the amplifier by using the error signal to provide a corrected signal, wherein the error signal generating means comprises serially connected, independently acting first amplitude adjusting means and second phase adjusting means for automatically adjusting the amplitude and phase of at least one of the error signals, a signal used in generating the error signal, and a signal used in providing the corrected signal, in response to respective first and second simultaneously derived control signals to provide improved cancellation of the distortion, and a control means for generating the first and second control signals from at least two signals, one of which is dependent on the input signals or signals derived therefrom. 2. Apparatus according to claim 1, wherein the means for generating an error signal is such that the first and second control signals are substantially independent of each other, at least when the distortion is substantially cancelled. 3. Device according to claim 1 or 2, wherein the means for generating an error signal comprises a subtraction means for subtracting the input signals from signals representative of the output signals of the amplifier when generating the error signal and wherein the first and second adjusting means are arranged to adjust the phase and amplitude of the input signals to the amplifier or to the subtraction means in response to the control signals so that the error signal contains substantially only the distortion. 4. Apparatus according to claim 3, comprising independently acting third and fourth adjustment means for automatically adjusting the phase and amplitude of the error signal, respectively, in response to respective third and fourth simultaneous independent control signals so that the correction means performs substantially optimal cancellation of the distortion. 5. Apparatus according to any one of claims 1 to 4, comprising a means for combining multiple input signal channels to provide a single input to the amplifier, and in which the first and second adjusting means comprise a plurality of phase and amplitude adjusting elements, one pair for each input channel. 6. Apparatus according to any preceding claim, wherein the control means comprises processing means for processing first and second control means input signals with the two input signals to provide the first and second control signals, a first means for deriving the first control means input signals from a location in the device where a signal representative of the input signals occurs, and a second means for deriving the second control means input signals from a location in the device where a signal representative of the error signal occurs. 7. Device according to claim 6, as dependent on claim 5, in which the processing means includes a plurality of subunits, one connected to each input signal channel, and for supplying one of the first and one of the second control signals to the adjustment elements of the associated channel, the first means comprises means for deriving a signal from each input signal channel to provide first control means input signals, one for each sub-unit, the second means includes means for deriving the error signal at an input to the correction means, and means for dividing the derived error signal into a plurality of second control means input signals, one for each sub-unit. 8. Apparatus according to claim 4 or any of claims 5 to 7 when dependent on claim 4, wherein the control means comprises means for processing third and fourth control means input signals to provide the third and fourth control signals, a third means for deriving the third control means input signals from a location in the device where a signal representative of the output signal of the correction means occurs, and fourth means for deriving the fourth control means input signals from a location in the device where a signal representative of the error signal occurs. 9. Apparatus according to claim 8, as dependent on claim 7, wherein the means for deriving the error signal at an input to the correction means also forms the fourth means. 10. Apparatus according to any one of claims 6 to 9, wherein at least one of the processing means, or sub-units thereof, is designed to derive in-phase and quadrature signals from the control means input signals or signals representative thereof and to provide control signals representative by polarity and magnitude of the relative phases and amplitudes of the control means input signals applied to that processing means or sub-unit. 11. Device according to one of claims 6 to 9, in which at least one of the processing means or their sub-units has first and second mixers and a 90° phase shift means connected to an input of the second mixer, the first mixer and the shift means being connected to receive the first and second or third and fourth control means input signals, respectively, or signals representative thereof, and first and second groups, each comprising a low-pass filter, differentiating means and integrating means connected in series, wherein inputs of the first and second groups are connected to the outputs of the first and second mixers respectively and outputs of the first and second groups each supply one of the control signals. 12. Device according to one of claims 6 to 9, in which at least one of the processing means or their subunits has first and second mixers and a 90° phase shift means connected to an input of the second mixer, the first mixer and the shift means being connected to receive the first and second or third and fourth control means input signals, respectively, and first and second groups, each comprising a low-pass filter, an amplifier and integration means, which are connected in series, inputs of the first and second groups being connected to the outputs of the first and second mixers, respectively, and outputs of the first and second groups each supplying one of the control signals. 13. Device according to one of claims 6 to 12, in which at least one of the processing means contains an offset means for reducing the frequencies of the control means input signals. 14. Device according to claim 13, wherein the offset means comprises first and second signal generators with output frequencies, the frequency difference of which is equal to the required reduced frequency of the control means input signals, third and fourth mixers coupled to receive the outputs of the first and second signal generators respectively and respective control means input signals for that processing means, means for selecting the lower sidebands of the output signals of the third and fourth mixers, a fifth mixer coupled to receive the output signals of the signal generators, a sixth mixer coupled to receive the lower sidebands, and means for selecting the lower sidebands of the output signals of the fifth and sixth mixers as the reduced frequency control means input signals. 15. Device according to claim 13, wherein at least one of the processing means contains a signal generator with an output frequency at the required reduced frequency of the control means input signals and two outputs phase-shifted by 90º from each other, first and second pairs of mixers, each pair having an input terminal connected to apply quadrature phase-shifted signals to the respective mixers of the pair, and connected to receive the control means input signals for that processing means, respectively, wherein the mixers of the first pair are connected to receive the respective outputs of the signal generator and have an output terminal connected to combine the output signals of the mixers, wherein the mixers of the second pair are connected to receive the combined output signals of the first pair and have separate output terminals, and means for selecting the lower sidebands of the mixers of the second pair as the reduced frequency control means input signals. 16. Apparatus according to claim 13, 14 or 15, wherein the control means input signals are passed at reduced frequency in operation to a digital signal processing circuit (a DSP chip) forming part of the processing means. 17. Device according to one of claims 6 to 9, in which at least one of the processing means or their subunits comprises a polar coordinate means for providing amplitude control and phase control signals as the first and second control signals and/or third and fourth control signals, respectively. 18. Device according to claim 17, wherein the polar coordinate means comprises a phase adjustment means for adjusting the phase of the two control means input signals for this processor so that they are phase-shifted by 90º, a coherence detector coupled to receive the quadrature control means input signals for generating the first control signals, an amplitude limiter coupled to receive one of the control means input signals to the processor, and a phase detector for generating the second control signals, coupled to receive the output of the amplitude limiter and as a reference input the other of the input signals of the control means. 19. Apparatus according to any preceding claim, wherein at least one of the first and second adjustment means and, if present, the third and fourth adjustment means comprise an amplifier. 20. A method for reducing distortion produced by an amplifier, comprising the steps of Deriving an error signal that depends on the output signals of the amplifier and input signals fed to the amplifier, which is required to provide undistorted output signals, Canceling the distortion produced by the amplifier, wherein the error signal is used to provide a corrected error signal, automatically making separate amplitude adjustments and phase adjustments in sequence to at least one of the error signals, a signal used in generating the error signal and a signal used in providing the corrected signal, in response to respective simultaneously derived first and second control signals to provide substantially improved cancellation of the distortion, and Generating the control signals from at least two signals, one of which is dependent on the input signals or signals derived therefrom. 21. The method according to claim 20, wherein deriving the error signal includes subtracting the input signals from a signal representative of the output signals of the amplifier, the phase and amplitude of the input signals to the amplifier or, while used in deriving the error signal, in the phase and amplitude are adjusted so that the error signal essentially contains only the distortion, and the first and second control signals are used to adjust the phase and amplitude of the input signals and are derived depending on the input signals and the error signal or a signal representative thereof. 22. The method according to claim 21, wherein the phase and amplitude of the error signal are adjusted in phase and amplitude so that cancellation of the distortion using the error signal is essentially optimal, and third and fourth control signals are used in adjusting the phase and amplitude of the error signal and are derived depending on the error signal and the output signals of the amplifier. 23. Method according to claim 20, 21 or 22 with combining multiple input signal channels to provide a single input to the amplifier, Deriving first control input signals from each input signal channel, Deriving second control input signals that are representative of the error signal, wherein the first and second control input signals comprise the two signals, and in which an automatic adjustment of the amplitude and phase using the control input signals and comprising adjusting the input signals by a plurality of processes, one connected to each input signal channel and providing one of the first control signals and one of the second control signals to adjust the amplitude and phase of the associated channel. 24. Method according to claim 23, as dependent on claim 21, with deriving the third control input signals as representative of the output signal of the amplifier after a distortion cancellation, and deriving the fourth control input signals as representative of the error signal. 25. The method of claim 24, wherein generating at least two of the control signals comprises deriving in-phase and quadrature-phase signals from two of the control input signals and deriving the two control signals from the in-phase and 90º phase-shifted signals. 26. Method according to claim 25 with reducing the frequency of two of the control input signals and generating two of the control signals from the signals with reduced frequency.