DE69124238D1 - Digitaler Sigma-Delta-Modulator - Google Patents

Digitaler Sigma-Delta-Modulator

Info

Publication number
DE69124238D1
DE69124238D1 DE69124238T DE69124238T DE69124238D1 DE 69124238 D1 DE69124238 D1 DE 69124238D1 DE 69124238 T DE69124238 T DE 69124238T DE 69124238 T DE69124238 T DE 69124238T DE 69124238 D1 DE69124238 D1 DE 69124238D1
Authority
DE
Germany
Prior art keywords
delta modulator
digital sigma
sigma
digital
modulator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69124238T
Other languages
English (en)
Other versions
DE69124238T2 (de
Inventor
Didier Rene Haspeslagh
Erik Moerman
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nokia Bell NV
Original Assignee
Alcatel Bell NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel Bell NV filed Critical Alcatel Bell NV
Application granted granted Critical
Publication of DE69124238D1 publication Critical patent/DE69124238D1/de
Publication of DE69124238T2 publication Critical patent/DE69124238T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50Adding; Subtracting
    • G06F7/505Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H03M7/30Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
    • H03M7/3002Conversion to or from differential modulation
    • H03M7/3004Digital delta-sigma modulation
    • H03M7/3015Structural details of digital delta-sigma modulators
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/499Denomination or exception handling, e.g. rounding or overflow
    • G06F7/49905Exception handling
    • G06F7/4991Overflow or underflow
    • G06F7/49921Saturation, i.e. clipping the result to a minimum or maximum value
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H03M7/30Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
    • H03M7/3002Conversion to or from differential modulation
    • H03M7/3004Digital delta-sigma modulation
    • H03M7/3015Structural details of digital delta-sigma modulators
    • H03M7/302Structural details of digital delta-sigma modulators characterised by the number of quantisers and their type and resolution
    • H03M7/3024Structural details of digital delta-sigma modulators characterised by the number of quantisers and their type and resolution having one quantiser only
    • H03M7/3028Structural details of digital delta-sigma modulators characterised by the number of quantisers and their type and resolution having one quantiser only the quantiser being a single bit one
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H03M7/30Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
    • H03M7/3002Conversion to or from differential modulation
    • H03M7/3004Digital delta-sigma modulation
    • H03M7/3015Structural details of digital delta-sigma modulators
    • H03M7/3031Structural details of digital delta-sigma modulators characterised by the order of the loop filter, e.g. having a first order loop filter in the feedforward path
    • H03M7/3033Structural details of digital delta-sigma modulators characterised by the order of the loop filter, e.g. having a first order loop filter in the feedforward path the modulator having a higher order loop filter in the feedforward path, e.g. with distributed feedforward inputs
    • H03M7/304Structural details of digital delta-sigma modulators characterised by the order of the loop filter, e.g. having a first order loop filter in the feedforward path the modulator having a higher order loop filter in the feedforward path, e.g. with distributed feedforward inputs with distributed feedback, i.e. with feedback paths from the quantiser output to more than one filter stage

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computing Systems (AREA)
  • Mathematical Optimization (AREA)
  • General Engineering & Computer Science (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Transmission Systems Not Characterized By The Medium Used For Transmission (AREA)
DE69124238T 1991-06-28 1991-06-28 Digitaler Sigma-Delta-Modulator Expired - Fee Related DE69124238T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP91870103A EP0531604B1 (de) 1991-06-28 1991-06-28 Digitaler Sigma-Delta-Modulator

Publications (2)

Publication Number Publication Date
DE69124238D1 true DE69124238D1 (de) 1997-02-27
DE69124238T2 DE69124238T2 (de) 1997-07-03

Family

ID=8209024

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69124238T Expired - Fee Related DE69124238T2 (de) 1991-06-28 1991-06-28 Digitaler Sigma-Delta-Modulator

Country Status (8)

Country Link
US (1) US5325399A (de)
EP (1) EP0531604B1 (de)
JP (1) JPH05206958A (de)
CA (1) CA2072526C (de)
DE (1) DE69124238T2 (de)
ES (1) ES2099153T3 (de)
FI (1) FI922989A (de)
NO (1) NO922305L (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0702465A1 (de) * 1994-09-13 1996-03-20 T.R.T. Telecommunications Radioelectriques Et Telephoniques Übertragungssystem und -gerät zum Multiplexieren und Demultiplexieren eines binären Datenstroms, der gestapft sein kann
US5742246A (en) * 1996-03-22 1998-04-21 National Science Council Stabilizing mechanism for sigma-delta modulator
US5815102A (en) * 1996-06-12 1998-09-29 Audiologic, Incorporated Delta sigma pwm dac to reduce switching
EP0903862B1 (de) * 1997-09-19 2003-06-25 STMicroelectronics S.r.l. Tiefpassfilter mit mehreren Übertragungsraten mit geschalteten Kondensatoren und doppelter Signalabtastung für sigma-delta Digital-/Analog-Wandler
US5896056A (en) * 1997-12-01 1999-04-20 Texmate, Inc. Root-mean-square converter method and circuit
JP2000022544A (ja) * 1998-07-01 2000-01-21 Mitsubishi Electric Corp D/a変換装置
US7046098B2 (en) * 2001-11-27 2006-05-16 Texas Instruments Incorporated All-digital frequency synthesis with capacitive re-introduction of dithered tuning information
CN101145786B (zh) * 2006-09-15 2012-02-08 普诚科技股份有限公司 使用分时结构的积分三角电路及其相关方法
US7528755B2 (en) * 2007-09-06 2009-05-05 Infineon Technologies Ag Sigma-delta modulator for operating sensors
US8615540B2 (en) 2009-07-24 2013-12-24 Honeywell International Inc. Arithmetic logic unit for use within a flight control system
EP3681039A1 (de) 2019-01-09 2020-07-15 NXP USA, Inc. Vorrichtungen und verfahren mit unabhängigen modulationen eines digitalen taktsignals für verschiedene frequenzbereiche

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5382219A (en) * 1976-12-28 1978-07-20 Nec Corp Television signal coding unit
US4528551A (en) * 1979-11-28 1985-07-09 International Telephone And Telegraph Corporation Digital to analog converter employing sigma-delta modulation for use in telephone systems
JPH01233921A (ja) * 1988-03-15 1989-09-19 Toshiba Corp △−σ変調器を用いたa/d変換回路

Also Published As

Publication number Publication date
FI922989A (fi) 1992-12-29
CA2072526C (en) 1998-02-24
DE69124238T2 (de) 1997-07-03
US5325399A (en) 1994-06-28
JPH05206958A (ja) 1993-08-13
ES2099153T3 (es) 1997-05-16
NO922305L (no) 1992-12-29
EP0531604A1 (de) 1993-03-17
EP0531604B1 (de) 1997-01-15
NO922305D0 (no) 1992-06-11
FI922989A0 (fi) 1992-06-26
CA2072526A1 (en) 1992-12-29

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee