DE69117594D1 - Stromschaltende logische Schaltung - Google Patents

Stromschaltende logische Schaltung

Info

Publication number
DE69117594D1
DE69117594D1 DE69117594T DE69117594T DE69117594D1 DE 69117594 D1 DE69117594 D1 DE 69117594D1 DE 69117594 T DE69117594 T DE 69117594T DE 69117594 T DE69117594 T DE 69117594T DE 69117594 D1 DE69117594 D1 DE 69117594D1
Authority
DE
Germany
Prior art keywords
logic circuit
current switching
switching logic
current
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69117594T
Other languages
English (en)
Other versions
DE69117594T2 (de
Inventor
Noriyuki Hirakata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Electric Industries Ltd
Original Assignee
Sumitomo Electric Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Industries Ltd filed Critical Sumitomo Electric Industries Ltd
Application granted granted Critical
Publication of DE69117594D1 publication Critical patent/DE69117594D1/de
Publication of DE69117594T2 publication Critical patent/DE69117594T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/09432—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors with coupled sources or source coupled logic
    • H03K19/09436—Source coupled field-effect logic [SCFL]
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00346—Modifications for eliminating interference or parasitic voltages or currents
    • H03K19/00361—Modifications for eliminating interference or parasitic voltages or currents in field effect transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01—Modifications for accelerating switching
    • H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
    • H03K19/01707—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356017—Bistable circuits using additional transistors in the input circuit
    • H03K3/356034—Bistable circuits using additional transistors in the input circuit the input circuit having a differential configuration

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Power Engineering (AREA)
  • Logic Circuits (AREA)
DE69117594T 1990-06-22 1991-06-21 Stromschaltende logische Schaltung Expired - Fee Related DE69117594T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2165046A JPH0454724A (ja) 1990-06-22 1990-06-22 論理回路

Publications (2)

Publication Number Publication Date
DE69117594D1 true DE69117594D1 (de) 1996-04-11
DE69117594T2 DE69117594T2 (de) 1996-07-18

Family

ID=15804809

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69117594T Expired - Fee Related DE69117594T2 (de) 1990-06-22 1991-06-21 Stromschaltende logische Schaltung

Country Status (4)

Country Link
US (1) US5128556A (de)
EP (1) EP0464524B1 (de)
JP (1) JPH0454724A (de)
DE (1) DE69117594T2 (de)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04278719A (ja) * 1991-03-06 1992-10-05 Toshiba Corp ソース電極結合形論理回路
JPH05300001A (ja) * 1992-04-23 1993-11-12 Oki Electric Ind Co Ltd レベルシフト回路
JP3158728B2 (ja) * 1992-09-24 2001-04-23 ソニー株式会社 半導体スイッチ回路
DE69427311T2 (de) * 1993-01-08 2001-11-22 Sony Corp Vorspannungsstabilisierungsschaltung
US5420527A (en) * 1994-04-06 1995-05-30 Itt Corporation Temperature and supply insensitive TTL or CMOS to 0/-5 V translator
US5570042B1 (en) * 1995-01-03 2000-10-17 Sgs Thomson Micro Electronics Pecl input buffer
JP3689197B2 (ja) * 1996-09-06 2005-08-31 三菱電機株式会社 レベルシフト回路
JP3307547B2 (ja) * 1996-10-30 2002-07-24 富士通株式会社 レベルシフト回路及びこれを用いた電圧制御型発振回路
JP3963990B2 (ja) * 1997-01-07 2007-08-22 株式会社ルネサステクノロジ 内部電源電圧発生回路
US7705635B1 (en) 2006-08-09 2010-04-27 Marvell International Ltd. Circuit for converting a voltage range of a logic signal
US7595745B1 (en) * 2006-08-09 2009-09-29 Marvell International Ltd. Circuit for converting a voltage range of a logic signal
US7629909B1 (en) 2006-08-09 2009-12-08 Marvell International Ltd. Circuit for converting a voltage range of a logic signal
US7605608B1 (en) 2006-08-09 2009-10-20 Marvell International Ltd. Circuit for converting a voltage range of a logic signal
US7609186B1 (en) 2006-08-09 2009-10-27 Marvell International Ltd. Circuit for converting a voltage range of a logic signal
US7511649B1 (en) 2006-08-29 2009-03-31 Marvell International Ltd. Circuit for converting a voltage range of a logic signal
US8154320B1 (en) * 2009-03-24 2012-04-10 Lockheed Martin Corporation Voltage level shifter
US8154332B2 (en) * 2009-10-30 2012-04-10 Stmicroelectronics Design And Application Gmbh Current-controlled resistor

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4177390A (en) * 1977-12-27 1979-12-04 Raytheon Company A field effect transistor logic gate having depletion mode and enhancement mode transistors
US4450369A (en) * 1981-05-07 1984-05-22 Schuermeyer Fritz L Dynamic MESFET logic with voltage level shift circuit
US4490632A (en) * 1981-11-23 1984-12-25 Texas Instruments Incorporated Noninverting amplifier circuit for one propagation delay complex logic gates
JPS62501043A (ja) * 1984-12-10 1987-04-23 アメリカン テレフオン アンド テレグラフ カムパニ− 高信頼度相補論理回路
US4728821A (en) * 1985-04-19 1988-03-01 Digital Equipment Corporation Source follower current mode logic cells
DE3681193D1 (de) * 1985-05-02 1991-10-10 Nec Corp Auf einem verbundhalbleitersubstrat gebildete logische integrierte schaltungsvorrichtung.
JPS62290204A (ja) * 1986-06-10 1987-12-17 Fujitsu Ltd カスケ−ド回路を含む電子回路

Also Published As

Publication number Publication date
EP0464524B1 (de) 1996-03-06
DE69117594T2 (de) 1996-07-18
US5128556A (en) 1992-07-07
JPH0454724A (ja) 1992-02-21
EP0464524A1 (de) 1992-01-08

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee