DE69109888D1 - Taktfrequenzverdoppler. - Google Patents

Taktfrequenzverdoppler.

Info

Publication number
DE69109888D1
DE69109888D1 DE69109888T DE69109888T DE69109888D1 DE 69109888 D1 DE69109888 D1 DE 69109888D1 DE 69109888 T DE69109888 T DE 69109888T DE 69109888 T DE69109888 T DE 69109888T DE 69109888 D1 DE69109888 D1 DE 69109888D1
Authority
DE
Germany
Prior art keywords
clock frequency
frequency doubler
doubler
clock
frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69109888T
Other languages
English (en)
Other versions
DE69109888T2 (de
Inventor
Alain Artieri
Sylvain Kritter
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
SGS Thomson Microelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SGS Thomson Microelectronics SA filed Critical SGS Thomson Microelectronics SA
Application granted granted Critical
Publication of DE69109888D1 publication Critical patent/DE69109888D1/de
Publication of DE69109888T2 publication Critical patent/DE69109888T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/15Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
    • H03K5/151Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with two complementary outputs
    • H03K5/1515Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with two complementary outputs non-overlapping
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/00006Changing the frequency

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Manipulation Of Pulses (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
DE69109888T 1990-02-13 1991-02-08 Taktfrequenzverdoppler. Expired - Fee Related DE69109888T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9002216A FR2658370B1 (fr) 1990-02-13 1990-02-13 Doubleur de frequence d'horloge.

Publications (2)

Publication Number Publication Date
DE69109888D1 true DE69109888D1 (de) 1995-06-29
DE69109888T2 DE69109888T2 (de) 1995-10-26

Family

ID=9394036

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69109888T Expired - Fee Related DE69109888T2 (de) 1990-02-13 1991-02-08 Taktfrequenzverdoppler.

Country Status (5)

Country Link
US (1) US5111066A (de)
EP (1) EP0442829B1 (de)
JP (1) JP3114215B2 (de)
DE (1) DE69109888T2 (de)
FR (1) FR2658370B1 (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR960009965B1 (ko) * 1994-04-14 1996-07-25 금성일렉트론 주식회사 주파수 배수 회로
US6140861A (en) * 1994-06-27 2000-10-31 Texas Instruments Incorporated Bias pump arrangement including a signal-transition-detection circuit
FR2758022B1 (fr) * 1996-12-30 1999-02-19 Sgs Thomson Microelectronics Oscillateur et circuit de commande de commutation pour generateur de haute tension mettant en oeuvre cet oscillateur
US5864246A (en) * 1997-03-31 1999-01-26 Lsi Logic Corporation Method and apparatus for doubling a clock signal using phase interpolation
US6100736A (en) * 1997-06-05 2000-08-08 Cirrus Logic, Inc Frequency doubler using digital delay lock loop
US5963071A (en) * 1998-01-22 1999-10-05 Nanoamp Solutions, Inc. Frequency doubler with adjustable duty cycle
US6337588B1 (en) * 1998-07-17 2002-01-08 Oak Technology, Inc. Apparatus and method for doubling the frequency of a clock signal
KR100366627B1 (ko) * 2000-08-23 2003-01-09 삼성전자 주식회사 Dtc 기반 플립플럽 회로 및 비교기
DE10142657B4 (de) * 2001-08-31 2005-02-24 Infineon Technologies Ag Schaltungsanordnung zur Erzeugung nicht-überlappender Taktphasen
FR2879374B1 (fr) * 2004-12-15 2007-03-02 Commissariat Energie Atomique Dispositif doubleur de frequence
US7132863B2 (en) * 2005-04-04 2006-11-07 Freescale Semiconductor, Inc. Digital clock frequency doubler
US8502559B2 (en) * 2011-11-17 2013-08-06 Stmicroelectronics International N.V. Level translator
CN110113009B (zh) * 2018-02-01 2023-05-23 长鑫存储技术有限公司 倍频电路及倍频器

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2379198A1 (fr) * 1977-01-28 1978-08-25 Thomson Csf Horloge logique diphasee
JPS5498556A (en) * 1978-01-23 1979-08-03 Hitachi Denshi Ltd Frequency multplication circuit
US4634987A (en) * 1984-10-01 1987-01-06 Sundstrand Data Control, Inc. Frequency multiplier

Also Published As

Publication number Publication date
FR2658370A1 (fr) 1991-08-16
FR2658370B1 (fr) 1992-06-12
US5111066A (en) 1992-05-05
DE69109888T2 (de) 1995-10-26
JPH04213913A (ja) 1992-08-05
EP0442829A1 (de) 1991-08-21
EP0442829B1 (de) 1995-05-24
JP3114215B2 (ja) 2000-12-04

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee