DE69031673D1 - Schnittstelle zur Verbindung von einem Rechnerbus mit einem faseroptischen Ringnetzwerk - Google Patents

Schnittstelle zur Verbindung von einem Rechnerbus mit einem faseroptischen Ringnetzwerk

Info

Publication number
DE69031673D1
DE69031673D1 DE69031673T DE69031673T DE69031673D1 DE 69031673 D1 DE69031673 D1 DE 69031673D1 DE 69031673 T DE69031673 T DE 69031673T DE 69031673 T DE69031673 T DE 69031673T DE 69031673 D1 DE69031673 D1 DE 69031673D1
Authority
DE
Germany
Prior art keywords
interface
fiber optic
ring network
computer bus
optic ring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69031673T
Other languages
English (en)
Other versions
DE69031673T2 (de
Inventor
Gilbert Takats
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull SAS
Original Assignee
Bull SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bull SAS filed Critical Bull SAS
Publication of DE69031673D1 publication Critical patent/DE69031673D1/de
Application granted granted Critical
Publication of DE69031673T2 publication Critical patent/DE69031673T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10Program control for peripheral devices
    • G06F13/12Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/124Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine
    • G06F13/128Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine for dedicated transfers to a network
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/42Loop networks
    • H04L12/427Loop networks with decentralised control
    • H04L12/433Loop networks with decentralised control with asynchronous transmission, e.g. token ring, register insertion

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Small-Scale Networks (AREA)
  • Communication Control (AREA)
  • Optical Communication System (AREA)
DE69031673T 1989-07-27 1990-07-23 Schnittstelle zur Verbindung von einem Rechnerbus mit einem faseroptischen Ringnetzwerk Expired - Fee Related DE69031673T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8910156A FR2650412B1 (fr) 1989-07-27 1989-07-27 Dispositif passerelle de connexion d'un bus d'ordinateur a un reseau fibre optique en forme d'anneau

Publications (2)

Publication Number Publication Date
DE69031673D1 true DE69031673D1 (de) 1997-12-11
DE69031673T2 DE69031673T2 (de) 1998-03-05

Family

ID=9384212

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69031673T Expired - Fee Related DE69031673T2 (de) 1989-07-27 1990-07-23 Schnittstelle zur Verbindung von einem Rechnerbus mit einem faseroptischen Ringnetzwerk

Country Status (4)

Country Link
EP (1) EP0410860B1 (de)
JP (1) JPH0683234B2 (de)
DE (1) DE69031673T2 (de)
FR (1) FR2650412B1 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2679352B1 (fr) 1991-07-15 1996-12-13 Bull Sa Dispositif universel de couplage d'un bus d'ordinateur a un controleur d'un groupe de peripheriques.
FR2682245B1 (fr) * 1991-10-08 1994-07-29 Bull Sa Systeme de test d'un reseau en forme d'anneau a tres haut debit et procede de mise en óoeuvre de ce systeme.
FR2685512B1 (fr) * 1991-12-19 1994-02-11 Bull Sa Controleur de transfert multiple de donnees entre une pluralite de memoires et un bus d'ordinateur.
FR2699706B1 (fr) * 1992-12-22 1995-02-24 Bull Sa Système de transmission de données entre un bus d'ordinateur et un réseau.
JP2541747B2 (ja) * 1993-03-31 1996-10-09 日本電気株式会社 通信用スイッチングシステム
US5694615A (en) * 1995-06-26 1997-12-02 Hewlett Packard Company Storage system having storage units interconnected to form multiple loops to provide simultaneous access from multiple hosts
JPH11510929A (ja) * 1995-08-11 1999-09-21 シーメンス ニクスドルフ インフオルマチオーンスジステーメ アクチエンゲゼルシヤフト 周辺記憶装置を接続するための装置
KR100544188B1 (ko) * 2003-06-19 2006-01-23 삼성전자주식회사 네트워크 전자기기의 데이터 인터페이스 장치 및 방법
DE102006033639A1 (de) * 2006-07-20 2008-01-24 Robert Bosch Gmbh Elektronische Vorrichtung zum Anschluss an einen optischen Datenbus und Verfahren

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1984003192A1 (en) * 1983-02-07 1984-08-16 American Telephone & Telegraph Data network interface
EP0193305A3 (de) * 1985-02-13 1989-01-18 Texas Instruments Incorporated Schnittstelle zum Koppeln eines Standardmikroprozessors mit einem Überwachungsadapter
US4845609A (en) * 1986-07-25 1989-07-04 Systech Corporation Computer communications subsystem using an embedded token-passing network

Also Published As

Publication number Publication date
EP0410860B1 (de) 1997-11-05
FR2650412A1 (fr) 1991-02-01
FR2650412B1 (fr) 1991-10-11
JPH0683234B2 (ja) 1994-10-19
JPH03141746A (ja) 1991-06-17
EP0410860A1 (de) 1991-01-30
DE69031673T2 (de) 1998-03-05

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee