DE69029450D1 - PLD mit einem Konfigurationsspeicher mit Aushilfsstromversorgung, und Verfahren für die Stromversorgung eines PLDs mit Konfigurationsspeicher - Google Patents

PLD mit einem Konfigurationsspeicher mit Aushilfsstromversorgung, und Verfahren für die Stromversorgung eines PLDs mit Konfigurationsspeicher

Info

Publication number
DE69029450D1
DE69029450D1 DE69029450T DE69029450T DE69029450D1 DE 69029450 D1 DE69029450 D1 DE 69029450D1 DE 69029450 T DE69029450 T DE 69029450T DE 69029450 T DE69029450 T DE 69029450T DE 69029450 D1 DE69029450 D1 DE 69029450D1
Authority
DE
Germany
Prior art keywords
pld
configuration memory
powering
power supply
backup power
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69029450T
Other languages
English (en)
Other versions
DE69029450T2 (de
Inventor
Randy Charles Steele
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics lnc USA
Original Assignee
SGS Thomson Microelectronics Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SGS Thomson Microelectronics Inc filed Critical SGS Thomson Microelectronics Inc
Publication of DE69029450D1 publication Critical patent/DE69029450D1/de
Application granted granted Critical
Publication of DE69029450T2 publication Critical patent/DE69029450T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17748—Structural details of configuration resources
    • H03K19/17772—Structural details of configuration resources for powering on or off
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/141—Battery and back-up supplies
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17748—Structural details of configuration resources
    • H03K19/1776—Structural details of configuration resources for memories

Landscapes

  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Logic Circuits (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
DE1990629450 1989-09-29 1990-06-29 PLD mit einem Konfigurationsspeicher mit Aushilfsstromversorgung, und Verfahren für die Stromversorgung eines PLDs mit Konfigurationsspeicher Expired - Fee Related DE69029450T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/414,712 US5099453A (en) 1989-09-29 1989-09-29 Configuration memory for programmable logic device

Publications (2)

Publication Number Publication Date
DE69029450D1 true DE69029450D1 (de) 1997-01-30
DE69029450T2 DE69029450T2 (de) 1997-05-15

Family

ID=23642630

Family Applications (1)

Application Number Title Priority Date Filing Date
DE1990629450 Expired - Fee Related DE69029450T2 (de) 1989-09-29 1990-06-29 PLD mit einem Konfigurationsspeicher mit Aushilfsstromversorgung, und Verfahren für die Stromversorgung eines PLDs mit Konfigurationsspeicher

Country Status (5)

Country Link
US (1) US5099453A (de)
EP (1) EP0420390B1 (de)
JP (1) JPH03166636A (de)
KR (1) KR910007128A (de)
DE (1) DE69029450T2 (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69229685T2 (de) * 1991-02-01 2000-04-06 Advanced Micro Devices Inc Mikrokontroller mit statischen RAM
US5572707A (en) * 1993-05-27 1996-11-05 Intel Corporation Nonvolatile memory with a programmable configuration cell and a configuration logic for temporarily reconfiguring the memory without altering the programmed state of the configuration cell
US5542042A (en) * 1993-05-27 1996-07-30 Whirlpool Corporation Method and apparatus for monitoring volatile memory validity
US5677691A (en) * 1993-06-25 1997-10-14 Fraunhofer-Gesellschaft Zur Forderung Der Angewandten Forschung E.V. Configurable analog and digital array
US5635774A (en) * 1993-11-24 1997-06-03 Sgs-Thomson Microelectronics, Inc. Zero power latchup suppression circuit
US5384747A (en) * 1994-01-07 1995-01-24 Compaq Computer Corporation Circuit for placing a memory device into low power mode
US5438549A (en) * 1994-02-28 1995-08-01 Intel Corporation Nonvolatile memory with volatile memory buffer and a backup power supply system
US5747890A (en) 1995-06-05 1998-05-05 Sgs-Thomson Microelectronics, Inc. Power supply switch reference circuitry
US6380762B1 (en) * 1997-03-27 2002-04-30 Cypress Semiconductor Corporation Multi-level programmable voltage control and output buffer with selectable operating voltage
US6385735B1 (en) * 1997-12-15 2002-05-07 Intel Corporation Method and apparatus for limiting processor clock frequency
US6161188A (en) * 1998-11-17 2000-12-12 Ip-First, L.L.C. Microprocessor having fuse control and selection of clock multiplier
US7511388B2 (en) * 2006-06-06 2009-03-31 Silicon Laboratories, Inc. System and method of detection of power loss in powered ethernet devices

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3859638A (en) * 1973-05-31 1975-01-07 Intersil Inc Non-volatile memory unit with automatic standby power supply
JPS558135A (en) * 1978-07-04 1980-01-21 Mamoru Tanaka Rewritable programable logic array
US4288865A (en) * 1980-02-06 1981-09-08 Mostek Corporation Low-power battery backup circuit for semiconductor memory
JPS6061988A (ja) * 1983-09-16 1985-04-09 Toshiba Corp 半導体メモリ
US4706216A (en) * 1985-02-27 1987-11-10 Xilinx, Inc. Configurable logic element
US4783606A (en) * 1987-04-14 1988-11-08 Erich Goetting Programming circuit for programmable logic array I/O cell
US4812675A (en) * 1987-04-15 1989-03-14 Exel Microelectronics Incorporated Security element circuit for programmable logic array
US4894558A (en) * 1988-10-11 1990-01-16 Nec Electronics Inc. Power saving input buffer for use with a gate array

Also Published As

Publication number Publication date
EP0420390A2 (de) 1991-04-03
EP0420390B1 (de) 1996-12-18
DE69029450T2 (de) 1997-05-15
US5099453A (en) 1992-03-24
JPH03166636A (ja) 1991-07-18
KR910007128A (ko) 1991-04-30
EP0420390A3 (en) 1991-09-04

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee