DE68927415D1 - Kontextumschaltungsverfahren und -anordnung zur Verwendung in einem Vektorverarbeitungssystem - Google Patents

Kontextumschaltungsverfahren und -anordnung zur Verwendung in einem Vektorverarbeitungssystem

Info

Publication number
DE68927415D1
DE68927415D1 DE68927415T DE68927415T DE68927415D1 DE 68927415 D1 DE68927415 D1 DE 68927415D1 DE 68927415 T DE68927415 T DE 68927415T DE 68927415 T DE68927415 T DE 68927415T DE 68927415 D1 DE68927415 D1 DE 68927415D1
Authority
DE
Germany
Prior art keywords
arrangement
processing system
switching method
vector processing
context switching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE68927415T
Other languages
English (en)
Other versions
DE68927415T2 (de
Inventor
Dileep P Bhandarkar
Dave Cutler
Wayne Cardoza
Rich Witek
Dave Orbits
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Digital Equipment Corp
Original Assignee
Digital Equipment Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Digital Equipment Corp filed Critical Digital Equipment Corp
Application granted granted Critical
Publication of DE68927415D1 publication Critical patent/DE68927415D1/de
Publication of DE68927415T2 publication Critical patent/DE68927415T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/461—Saving or restoring of program or task context
    • G06F9/462—Saving or restoring of program or task context with multiple register sets

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Complex Calculations (AREA)
DE68927415T 1988-03-18 1989-03-06 Kontextumschaltungsverfahren und -anordnung zur Verwendung in einem Vektorverarbeitungssystem Expired - Fee Related DE68927415T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/170,399 US5008812A (en) 1988-03-18 1988-03-18 Context switching method and apparatus for use in a vector processing system

Publications (2)

Publication Number Publication Date
DE68927415D1 true DE68927415D1 (de) 1996-12-12
DE68927415T2 DE68927415T2 (de) 1997-05-28

Family

ID=22619714

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68927415T Expired - Fee Related DE68927415T2 (de) 1988-03-18 1989-03-06 Kontextumschaltungsverfahren und -anordnung zur Verwendung in einem Vektorverarbeitungssystem

Country Status (5)

Country Link
US (1) US5008812A (de)
EP (1) EP0333366B1 (de)
JP (1) JPH0242569A (de)
CA (1) CA1317027C (de)
DE (1) DE68927415T2 (de)

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US5167028A (en) * 1989-11-13 1992-11-24 Lucid Corporation System for controlling task operation of slave processor by switching access to shared memory banks by master processor
JP2504235B2 (ja) * 1989-11-16 1996-06-05 三菱電機株式会社 デ―タ処理装置
US5544337A (en) * 1989-12-29 1996-08-06 Cray Research, Inc. Vector processor having registers for control by vector resisters
US5623650A (en) * 1989-12-29 1997-04-22 Cray Research, Inc. Method of processing a sequence of conditional vector IF statements
US5197130A (en) * 1989-12-29 1993-03-23 Supercomputer Systems Limited Partnership Cluster architecture for a highly parallel scalar/vector multiprocessor system
US5598547A (en) * 1990-06-11 1997-01-28 Cray Research, Inc. Vector processor having functional unit paths of differing pipeline lengths
US5390329A (en) * 1990-06-11 1995-02-14 Cray Research, Inc. Responding to service requests using minimal system-side context in a multiprocessor environment
WO1992003783A1 (en) * 1990-08-23 1992-03-05 Supercomputer Systems Limited Partnership Method of implementing kernel functions
US5742839A (en) * 1992-01-30 1998-04-21 Fujitsu Limited Coprocessor for performing an arithmetic operation by automatically reading data from an external memory
US5423051A (en) * 1992-09-24 1995-06-06 International Business Machines Corporation Execution unit with an integrated vector operation capability
US5428779A (en) * 1992-11-09 1995-06-27 Seiko Epson Corporation System and method for supporting context switching within a multiprocessor system having functional blocks that generate state programs with coded register load instructions
JP2561801B2 (ja) * 1993-02-24 1996-12-11 インターナショナル・ビジネス・マシーンズ・コーポレイション プロセス・スケジューリングの管理方法およびシステム
US5623698A (en) * 1993-04-30 1997-04-22 Cray Research, Inc. Memory interconnect network having separate routing networks for inputs and outputs using switches with FIFO queues and message steering bits
US5619709A (en) * 1993-09-20 1997-04-08 Hnc, Inc. System and method of context vector generation and retrieval
US5490272A (en) * 1994-01-28 1996-02-06 International Business Machines Corporation Method and apparatus for creating multithreaded time slices in a multitasking operating system
US5666523A (en) * 1994-06-30 1997-09-09 Microsoft Corporation Method and system for distributing asynchronous input from a system input queue to reduce context switches
US5481719A (en) * 1994-09-09 1996-01-02 International Business Machines Corporation Exception handling method and apparatus for a microkernel data processing system
CN101211255B (zh) 1994-12-02 2012-07-04 英特尔公司 对复合操作数进行压缩操作的处理器、设备和计算系统
US5852726A (en) * 1995-12-19 1998-12-22 Intel Corporation Method and apparatus for executing two types of instructions that specify registers of a shared logical register file in a stack and a non-stack referenced manner
US5701508A (en) 1995-12-19 1997-12-23 Intel Corporation Executing different instructions that cause different data type operations to be performed on single logical register file
US5835748A (en) * 1995-12-19 1998-11-10 Intel Corporation Method for executing different sets of instructions that cause a processor to perform different data type operations on different physical registers files that logically appear to software as a single aliased register file
US5857096A (en) * 1995-12-19 1999-01-05 Intel Corporation Microarchitecture for implementing an instruction to clear the tags of a stack reference register file
US5940859A (en) * 1995-12-19 1999-08-17 Intel Corporation Emptying packed data state during execution of packed data instructions
US6792523B1 (en) 1995-12-19 2004-09-14 Intel Corporation Processor with instructions that operate on different data types stored in the same single logical register file
US5812823A (en) * 1996-01-02 1998-09-22 International Business Machines Corporation Method and system for performing an emulation context save and restore that is transparent to the operating system
US5867689A (en) * 1996-05-01 1999-02-02 Mci Communications Corporation Method and apparatus for emulating a digital cross-connect switch network using a flexible topology to test MCS network management
US5809286A (en) * 1996-05-01 1998-09-15 Mci Communications Corporation Method and apparatus for emulating a dynamically configured digital cross-connect switch network
US5850536A (en) * 1996-05-01 1998-12-15 Mci Communications Corporation Method and system for simulated multi-tasking
US5812826A (en) * 1996-06-27 1998-09-22 Mci Communications Corporation Method and apparatus for emulating a network of state monitoring devices
US6061711A (en) * 1996-08-19 2000-05-09 Samsung Electronics, Inc. Efficient context saving and restoring in a multi-tasking computing system environment
US5954829A (en) * 1996-12-30 1999-09-21 Mci Communications Corporation System, method, and computer program product for digital cross connect testing
US5854930A (en) * 1996-12-30 1998-12-29 Mci Communications Corporations System, method, and computer program product for script processing
US6128641A (en) * 1997-09-12 2000-10-03 Siemens Aktiengesellschaft Data processing unit with hardware assisted context switching capability
US6223208B1 (en) 1997-10-03 2001-04-24 International Business Machines Corporation Moving data in and out of processor units using idle register/storage functional units
US5893159A (en) * 1997-10-22 1999-04-06 International Business Machines Corporation Methods and apparatus for managing scratchpad memory in a multiprocessor data processing system
US6230259B1 (en) * 1997-10-31 2001-05-08 Advanced Micro Devices, Inc. Transparent extended state save
US6256659B1 (en) 1997-12-09 2001-07-03 Mci Communications Corporation System and method for performing hybrid preemptive and cooperative multi-tasking in a computer system
US7013467B1 (en) 1997-12-09 2006-03-14 Mci Communications Corporation System and method for managing computer system resources using command control vectors
US5974532A (en) * 1997-12-09 1999-10-26 Mci Communications Corporation System and method for generating responses for inputs using a hybrid state engine table
US6205468B1 (en) * 1998-03-10 2001-03-20 Lucent Technologies, Inc. System for multitasking management employing context controller having event vector selection by priority encoding of contex events
EP1785863A3 (de) * 2000-02-29 2007-07-18 Fujitsu Limited Ein Dividierer mit Übertragsicherstellungsaddierer und Volladdierer
US7162615B1 (en) * 2000-06-12 2007-01-09 Mips Technologies, Inc. Data transfer bus communication using single request to perform command and return data to destination indicated in context to allow thread context switch
US8271994B2 (en) * 2006-02-11 2012-09-18 International Business Machines Corporation Reduced data transfer during processor context switching
JP2017037370A (ja) * 2015-08-06 2017-02-16 富士通株式会社 計算機、プロセス制御方法およびプロセス制御プログラム
US10599428B2 (en) * 2016-03-23 2020-03-24 Arm Limited Relaxed execution of overlapping mixed-scalar-vector instructions
GB2548601B (en) 2016-03-23 2019-02-13 Advanced Risc Mach Ltd Processing vector instructions

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US4128880A (en) * 1976-06-30 1978-12-05 Cray Research, Inc. Computer vector register processing
US4541046A (en) * 1981-03-25 1985-09-10 Hitachi, Ltd. Data processing system including scalar data processor and vector data processor
JPS57209570A (en) * 1981-06-19 1982-12-22 Fujitsu Ltd Vector processing device
JPS58114274A (ja) * 1981-12-28 1983-07-07 Hitachi Ltd デ−タ処理装置
JPS592143A (ja) * 1982-06-29 1984-01-07 Hitachi Ltd 情報処理装置
US4661900A (en) * 1983-04-25 1987-04-28 Cray Research, Inc. Flexible chaining in vector processor with selective use of vector registers as operand and result registers
US4636942A (en) * 1983-04-25 1987-01-13 Cray Research, Inc. Computer vector multiprocessing control
JPS6015771A (ja) * 1983-07-08 1985-01-26 Hitachi Ltd ベクトルプロセッサ
JPS6069746A (ja) * 1983-09-26 1985-04-20 Fujitsu Ltd ベクトル・デ−タ処理装置の制御方式
US4740893A (en) * 1985-08-07 1988-04-26 International Business Machines Corp. Method for reducing the time for switching between programs
JP2610821B2 (ja) * 1986-01-08 1997-05-14 株式会社日立製作所 マルチプロセツサシステム
JPS62221732A (ja) * 1986-03-24 1987-09-29 Nec Corp 情報処理装置

Also Published As

Publication number Publication date
EP0333366A3 (de) 1991-05-02
DE68927415T2 (de) 1997-05-28
JPH0242569A (ja) 1990-02-13
EP0333366A2 (de) 1989-09-20
CA1317027C (en) 1993-04-27
EP0333366B1 (de) 1996-11-06
US5008812A (en) 1991-04-16

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee