DE68927217D1 - Serielle Übertragungsstrecke für hohe Datenraten - Google Patents

Serielle Übertragungsstrecke für hohe Datenraten

Info

Publication number
DE68927217D1
DE68927217D1 DE68927217T DE68927217T DE68927217D1 DE 68927217 D1 DE68927217 D1 DE 68927217D1 DE 68927217 T DE68927217 T DE 68927217T DE 68927217 T DE68927217 T DE 68927217T DE 68927217 D1 DE68927217 D1 DE 68927217D1
Authority
DE
Germany
Prior art keywords
transmission path
data rates
high data
serial transmission
serial
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE68927217T
Other languages
English (en)
Other versions
DE68927217T2 (de
Inventor
Mark A Bryans
James H Cline
Francis B Frazee
Lark Edward Lehman
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Application granted granted Critical
Publication of DE68927217D1 publication Critical patent/DE68927217D1/de
Publication of DE68927217T2 publication Critical patent/DE68927217T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/38Synchronous or start-stop systems, e.g. for Baudot code
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M5/00Conversion of the form of the representation of individual digits
    • H03M5/02Conversion to or from representation by pulses
    • H03M5/04Conversion to or from representation by pulses the pulses having two levels
    • H03M5/14Code representation, e.g. transition, for a given bit cell depending on the information in one or more adjacent bit cells, e.g. delay modulation code, double density code
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M5/00Conversion of the form of the representation of individual digits
    • H03M5/02Conversion to or from representation by pulses
    • H03M5/04Conversion to or from representation by pulses the pulses having two levels
    • H03M5/14Code representation, e.g. transition, for a given bit cell depending on the information in one or more adjacent bit cells, e.g. delay modulation code, double density code
    • H03M5/145Conversion to or from block codes or representations thereof
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/38Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40Transmitting circuits; Receiving circuits
    • H04L25/49Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4906Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Communication Control (AREA)
  • Dc Digital Transmission (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
DE68927217T 1988-10-12 1989-10-06 Serielle Übertragungsstrecke für hohe Datenraten Expired - Fee Related DE68927217T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US25695488A 1988-10-12 1988-10-12

Publications (2)

Publication Number Publication Date
DE68927217D1 true DE68927217D1 (de) 1996-10-24
DE68927217T2 DE68927217T2 (de) 1997-01-30

Family

ID=22974285

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68927217T Expired - Fee Related DE68927217T2 (de) 1988-10-12 1989-10-06 Serielle Übertragungsstrecke für hohe Datenraten

Country Status (4)

Country Link
EP (1) EP0364170B1 (de)
JP (1) JP2851076B2 (de)
KR (1) KR0141918B1 (de)
DE (1) DE68927217T2 (de)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4020719A1 (de) * 1990-06-29 1992-01-02 Broadcast Television Syst Verfahren zur uebertragung eines digitalen datensignals

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51136223A (en) * 1975-05-21 1976-11-25 Hitachi Ltd Bit insertion circuit
JPS60152155A (ja) * 1984-01-20 1985-08-10 Hitachi Ltd 符号化方式
JPS61292434A (ja) * 1985-05-17 1986-12-23 Fujitsu Ltd バツフアメモリ

Also Published As

Publication number Publication date
EP0364170A3 (de) 1991-12-11
JP2851076B2 (ja) 1999-01-27
JPH02211744A (ja) 1990-08-23
DE68927217T2 (de) 1997-01-30
EP0364170A2 (de) 1990-04-18
EP0364170B1 (de) 1996-09-18
KR0141918B1 (ko) 1998-07-01
KR900007203A (ko) 1990-05-09

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee