DE68927158T2 - PLL-Synthetisierer - Google Patents
PLL-SynthetisiererInfo
- Publication number
- DE68927158T2 DE68927158T2 DE68927158T DE68927158T DE68927158T2 DE 68927158 T2 DE68927158 T2 DE 68927158T2 DE 68927158 T DE68927158 T DE 68927158T DE 68927158 T DE68927158 T DE 68927158T DE 68927158 T2 DE68927158 T2 DE 68927158T2
- Authority
- DE
- Germany
- Prior art keywords
- pll synthesizer
- pll
- synthesizer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
- H03L7/107—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth
- H03L7/1075—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth by changing characteristics of the loop filter, e.g. changing the gain, changing the bandwidth
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
- H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63332371A JPH02177725A (ja) | 1988-12-28 | 1988-12-28 | Pllシンセサイザ回路 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE68927158D1 DE68927158D1 (de) | 1996-10-17 |
DE68927158T2 true DE68927158T2 (de) | 1997-02-06 |
Family
ID=18254215
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE68927158T Expired - Fee Related DE68927158T2 (de) | 1988-12-28 | 1989-12-27 | PLL-Synthetisierer |
Country Status (4)
Country | Link |
---|---|
US (1) | US5047733A (de) |
EP (1) | EP0376847B1 (de) |
JP (1) | JPH02177725A (de) |
DE (1) | DE68927158T2 (de) |
Families Citing this family (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2748676B2 (ja) * | 1990-09-19 | 1998-05-13 | 日本電気株式会社 | Pll回路 |
EP0482823B1 (de) * | 1990-10-22 | 1998-08-26 | Nec Corporation | Frequenzsynthesierer mit PLL, der einen Frequenzwechsel des Ausgangs mit hoher Geschwindigkeit ermöglicht |
JP2819876B2 (ja) * | 1991-08-20 | 1998-11-05 | 松下電器産業株式会社 | 周波数シンセサイザ |
WO1993005578A1 (en) * | 1991-08-30 | 1993-03-18 | Fujitsu Limited | Frequency synthesizer |
JPH06112817A (ja) * | 1992-09-25 | 1994-04-22 | Fujitsu Ltd | Pll 周波数シンセサイザ回路 |
FI93286C (fi) * | 1993-03-08 | 1995-03-10 | Nokia Telecommunications Oy | Menetelmä kellosignaalin muodostamiseksi vaihelukitun silmukan avulla ja vaihelukittu silmukka |
FI98480C (fi) * | 1993-12-23 | 1997-06-25 | Nokia Mobile Phones Ltd | Menetelmä ja järjestely silmukkasuodattimen ohjaamiseksi |
DE69619783T2 (de) * | 1995-12-28 | 2002-10-02 | Thomson Consumer Electronics | Phasenregelschleife mit regelbarer Antwortzeit |
US5724008A (en) * | 1996-05-02 | 1998-03-03 | International Business Machines Corporation | Phase-locked loop with charge distribution |
US5675292A (en) * | 1996-06-05 | 1997-10-07 | Mccune, Jr.; Earl W. | Phase lock loop enabling smooth loop bandwidth switching over a wide range |
JP3024614B2 (ja) * | 1997-10-24 | 2000-03-21 | 日本電気株式会社 | ばらつき補償技術による半導体集積回路 |
TW513860B (en) * | 2001-09-12 | 2002-12-11 | Via Tech Inc | Clock and data recovery circuit and related method |
JP3748414B2 (ja) | 2002-02-07 | 2006-02-22 | 日本電信電話株式会社 | 位相同期ループ回路 |
EP1511174B1 (de) * | 2003-08-29 | 2007-06-13 | Texas Instruments Incorporated | Phasenregelschleife mit einer Ladungspumpe und Störunterdrückungsverbesserung der Stromversorgung |
US7865749B2 (en) * | 2003-10-31 | 2011-01-04 | International Business Machines Corporation | Method and apparatus for dynamic system-level frequency scaling |
JP4598691B2 (ja) * | 2006-02-22 | 2010-12-15 | 富士通セミコンダクター株式会社 | Pll回路及び半導体装置 |
JP2013090132A (ja) * | 2011-10-18 | 2013-05-13 | Renesas Mobile Corp | 半導体装置及びこれを搭載する無線通信端末 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5533554B2 (de) * | 1974-12-27 | 1980-09-01 | ||
GB1529116A (en) * | 1976-06-25 | 1978-10-18 | Indesit | Receiver having a device for tuning the receiver to a selected signal frequency for reception by the receiver |
US4330758A (en) * | 1980-02-20 | 1982-05-18 | Motorola, Inc. | Synchronized frequency synthesizer with high speed lock |
US4516083A (en) * | 1982-05-14 | 1985-05-07 | Motorola, Inc. | Fast lock PLL having out of lock detector control of loop filter and divider |
US4745372A (en) * | 1985-10-17 | 1988-05-17 | Matsushita Electric Industrial Co., Ltd. | Phase-locked-loop circuit having a charge pump |
US4752749A (en) * | 1986-12-22 | 1988-06-21 | Rockwell International Corporation | Fast response tuner |
-
1988
- 1988-12-28 JP JP63332371A patent/JPH02177725A/ja active Pending
-
1989
- 1989-12-21 US US07/454,589 patent/US5047733A/en not_active Expired - Fee Related
- 1989-12-27 EP EP89403666A patent/EP0376847B1/de not_active Expired - Lifetime
- 1989-12-27 DE DE68927158T patent/DE68927158T2/de not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
EP0376847A2 (de) | 1990-07-04 |
EP0376847A3 (de) | 1991-03-06 |
JPH02177725A (ja) | 1990-07-10 |
US5047733A (en) | 1991-09-10 |
EP0376847B1 (de) | 1996-09-11 |
DE68927158D1 (de) | 1996-10-17 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |