DE68926265D1 - Selbstdiagnoseschaltung für einen logischen Schaltungsblock - Google Patents

Selbstdiagnoseschaltung für einen logischen Schaltungsblock

Info

Publication number
DE68926265D1
DE68926265D1 DE68926265T DE68926265T DE68926265D1 DE 68926265 D1 DE68926265 D1 DE 68926265D1 DE 68926265 T DE68926265 T DE 68926265T DE 68926265 T DE68926265 T DE 68926265T DE 68926265 D1 DE68926265 D1 DE 68926265D1
Authority
DE
Germany
Prior art keywords
self
diagnosis
circuit
logic circuit
circuit block
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE68926265T
Other languages
English (en)
Other versions
DE68926265T2 (de
Inventor
Yasuyuki Nozuyama
Akira - Nishimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of DE68926265D1 publication Critical patent/DE68926265D1/de
Application granted granted Critical
Publication of DE68926265T2 publication Critical patent/DE68926265T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/3185Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318558Addressing or selecting of subparts of the device under test
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Quality & Reliability (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
DE68926265T 1988-06-22 1989-06-22 Selbstdiagnoseschaltung für einen logischen Schaltungsblock Expired - Fee Related DE68926265T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15401788 1988-06-22

Publications (2)

Publication Number Publication Date
DE68926265D1 true DE68926265D1 (de) 1996-05-23
DE68926265T2 DE68926265T2 (de) 1996-10-02

Family

ID=15575088

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68926265T Expired - Fee Related DE68926265T2 (de) 1988-06-22 1989-06-22 Selbstdiagnoseschaltung für einen logischen Schaltungsblock

Country Status (4)

Country Link
EP (1) EP0347906B1 (de)
JP (1) JPH077345B2 (de)
KR (1) KR920009635B1 (de)
DE (1) DE68926265T2 (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW211094B (en) * 1992-04-30 1993-08-11 American Telephone & Telegraph Built-in self-test network
JP2002100738A (ja) 2000-09-25 2002-04-05 Toshiba Corp 半導体集積回路及びテスト容易化回路の自動挿入方法
JP5353542B2 (ja) * 2009-08-06 2013-11-27 富士通セミコンダクター株式会社 半導体装置及び半導体装置の試験方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1536147A (en) * 1975-07-02 1978-12-20 Int Computers Ltd Data processing systems
AU530415B2 (en) * 1978-06-02 1983-07-14 International Standard Electric Corp. Integrated circuits
EP0181011A2 (de) * 1984-11-08 1986-05-14 Monolithic Memories, Inc. Verfahren und Schaltung zum Erkennen des logischen Zustandes von internen Knotenpunkten in sequentiellen logischen Schaltungen
JPS61138177A (ja) * 1984-12-11 1986-06-25 Fujitsu Ltd 複数機器の選択方法
US4710931A (en) * 1985-10-23 1987-12-01 Texas Instruments Incorporated Partitioned scan-testing system

Also Published As

Publication number Publication date
DE68926265T2 (de) 1996-10-02
EP0347906A3 (de) 1991-03-27
EP0347906B1 (de) 1996-04-17
JPH0277849A (ja) 1990-03-16
KR920009635B1 (ko) 1992-10-22
EP0347906A2 (de) 1989-12-27
JPH077345B2 (ja) 1995-01-30
KR910001968A (ko) 1991-01-31

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee