DE68924380D1 - Vernichtung von Pipelineblasen in einem Rechnersystem. - Google Patents
Vernichtung von Pipelineblasen in einem Rechnersystem.Info
- Publication number
- DE68924380D1 DE68924380D1 DE68924380T DE68924380T DE68924380D1 DE 68924380 D1 DE68924380 D1 DE 68924380D1 DE 68924380 T DE68924380 T DE 68924380T DE 68924380 T DE68924380 T DE 68924380T DE 68924380 D1 DE68924380 D1 DE 68924380D1
- Authority
- DE
- Germany
- Prior art keywords
- pipeline
- bubble
- stage
- computer system
- cpu
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 230000006378 damage Effects 0.000 title 1
- 230000006835 compression Effects 0.000 abstract 1
- 238000007906 compression Methods 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
- G06F9/3873—Variable length pipelines, e.g. elastic pipeline
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3802—Instruction prefetching
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3802—Instruction prefetching
- G06F9/3814—Implementation provisions of instruction buffers, e.g. prefetch buffer; banks
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Advance Control (AREA)
- Pipeline Systems (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/221,988 US5019967A (en) | 1988-07-20 | 1988-07-20 | Pipeline bubble compression in a computer system |
Publications (2)
Publication Number | Publication Date |
---|---|
DE68924380D1 true DE68924380D1 (de) | 1995-11-02 |
DE68924380T2 DE68924380T2 (de) | 1996-06-13 |
Family
ID=22830272
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE68924380T Expired - Fee Related DE68924380T2 (de) | 1988-07-20 | 1989-07-20 | Vernichtung von Pipelineblasen in einem Rechnersystem. |
Country Status (6)
Country | Link |
---|---|
US (1) | US5019967A (de) |
EP (1) | EP0352103B1 (de) |
JP (1) | JPH0774991B2 (de) |
AT (1) | ATE128565T1 (de) |
CA (1) | CA1320275C (de) |
DE (1) | DE68924380T2 (de) |
Families Citing this family (42)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2858140B2 (ja) * | 1988-10-19 | 1999-02-17 | アポロ・コンピューター・インコーポレーテッド | パイプラインプロセッサ装置および方法 |
JPH0395629A (ja) * | 1989-09-08 | 1991-04-22 | Fujitsu Ltd | データ処理装置 |
US5555384A (en) * | 1989-12-01 | 1996-09-10 | Silicon Graphics, Inc. | Rescheduling conflicting issued instructions by delaying one conflicting instruction into the same pipeline stage as a third non-conflicting instruction |
US5280597A (en) * | 1990-03-30 | 1994-01-18 | Mitsubishi Denki Kabushiki Kaisha | Pipeline processor with self timed data transfer |
CA2045705A1 (en) * | 1990-06-29 | 1991-12-30 | Richard Lee Sites | In-register data manipulation in reduced instruction set processor |
US5430862A (en) * | 1990-06-29 | 1995-07-04 | Bull Hn Information Systems Inc. | Emulation of CISC instructions by RISC instructions using two pipelined stages for overlapped CISC decoding and RISC execution |
JPH04184534A (ja) * | 1990-11-20 | 1992-07-01 | Fujitsu Ltd | プロセッサ |
US5590294A (en) * | 1991-03-19 | 1996-12-31 | Silicon Graphics, Inc. | Method and apparatus for retarting pipeline processing |
US5325495A (en) * | 1991-06-28 | 1994-06-28 | Digital Equipment Corporation | Reducing stall delay in pipelined computer system using queue between pipeline stages |
US5524250A (en) * | 1991-08-23 | 1996-06-04 | Silicon Graphics, Inc. | Central processing unit for processing a plurality of threads using dedicated general purpose registers and masque register for providing access to the registers |
US5438668A (en) | 1992-03-31 | 1995-08-01 | Seiko Epson Corporation | System and method for extraction, alignment and decoding of CISC instructions into a nano-instruction bucket for execution by a RISC computer |
DE69408769T2 (de) * | 1993-10-18 | 1998-07-09 | Cyrix Corp | Fliessbandsteuerung und Registerübersetzung in Mikroprozessor |
US6073231A (en) * | 1993-10-18 | 2000-06-06 | Via-Cyrix, Inc. | Pipelined processor with microcontrol of register translation hardware |
US5630149A (en) * | 1993-10-18 | 1997-05-13 | Cyrix Corporation | Pipelined processor with register renaming hardware to accommodate multiple size registers |
US6138230A (en) * | 1993-10-18 | 2000-10-24 | Via-Cyrix, Inc. | Processor with multiple execution pipelines using pipe stage state information to control independent movement of instructions between pipe stages of an execution pipeline |
US6128721A (en) * | 1993-11-17 | 2000-10-03 | Sun Microsystems, Inc. | Temporary pipeline register file for a superpipelined superscalar processor |
US5864716A (en) * | 1994-01-07 | 1999-01-26 | Cirrus Logic, Inc. | Tagged data compression for parallel port interface |
US5784579A (en) * | 1994-03-01 | 1998-07-21 | Intel Corporation | Method and apparatus for dynamically controlling bus access from a bus agent based on bus pipeline depth |
US5548733A (en) * | 1994-03-01 | 1996-08-20 | Intel Corporation | Method and apparatus for dynamically controlling the current maximum depth of a pipe lined computer bus system |
US5636352A (en) * | 1994-12-16 | 1997-06-03 | International Business Machines Corporation | Method and apparatus for utilizing condensed instructions |
US5619408A (en) * | 1995-02-10 | 1997-04-08 | International Business Machines Corporation | Method and system for recoding noneffective instructions within a data processing system |
US5691920A (en) * | 1995-10-02 | 1997-11-25 | International Business Machines Corporation | Method and system for performance monitoring of dispatch unit efficiency in a processing system |
US5748855A (en) * | 1995-10-02 | 1998-05-05 | Iinternational Business Machines Corporation | Method and system for performance monitoring of misaligned memory accesses in a processing system |
US5751945A (en) * | 1995-10-02 | 1998-05-12 | International Business Machines Corporation | Method and system for performance monitoring stalls to identify pipeline bottlenecks and stalls in a processing system |
US5752062A (en) * | 1995-10-02 | 1998-05-12 | International Business Machines Corporation | Method and system for performance monitoring through monitoring an order of processor events during execution in a processing system |
US5797019A (en) * | 1995-10-02 | 1998-08-18 | International Business Machines Corporation | Method and system for performance monitoring time lengths of disabled interrupts in a processing system |
US5729726A (en) * | 1995-10-02 | 1998-03-17 | International Business Machines Corporation | Method and system for performance monitoring efficiency of branch unit operation in a processing system |
US5949971A (en) * | 1995-10-02 | 1999-09-07 | International Business Machines Corporation | Method and system for performance monitoring through identification of frequency and length of time of execution of serialization instructions in a processing system |
US5889975A (en) * | 1996-11-07 | 1999-03-30 | Intel Corporation | Method and apparatus permitting the use of a pipe stage having an unknown depth with a single microprocessor core |
US5944841A (en) * | 1997-04-15 | 1999-08-31 | Advanced Micro Devices, Inc. | Microprocessor with built-in instruction tracing capability |
US5933626A (en) * | 1997-06-12 | 1999-08-03 | Advanced Micro Devices, Inc. | Apparatus and method for tracing microprocessor instructions |
US6862563B1 (en) | 1998-10-14 | 2005-03-01 | Arc International | Method and apparatus for managing the configuration and functionality of a semiconductor design |
AU4848700A (en) * | 1999-05-13 | 2000-12-05 | Arc International U.S. Holdings Inc. | Method and apparatus for processor pipeline segmentation and re-assembly |
WO2001069411A2 (en) | 2000-03-10 | 2001-09-20 | Arc International Plc | Memory interface and method of interfacing between functional entities |
US6658557B1 (en) | 2000-05-25 | 2003-12-02 | Advanced Micro Devices, Inc. | Synthesizing the instruction stream executed by a microprocessor from its branch trace data |
US6993641B2 (en) * | 2000-11-08 | 2006-01-31 | Pts Corporation | Stall control |
US7000095B2 (en) | 2002-09-06 | 2006-02-14 | Mips Technologies, Inc. | Method and apparatus for clearing hazards using jump instructions |
US7653807B2 (en) * | 2005-09-19 | 2010-01-26 | Synopsys, Inc. | Removing a pipeline bubble by blocking clock signal to downstream stage when downstream stage contains invalid data |
US8127113B1 (en) | 2006-12-01 | 2012-02-28 | Synopsys, Inc. | Generating hardware accelerators and processor offloads |
JP2008198127A (ja) * | 2007-02-15 | 2008-08-28 | Toshiba Corp | プロセッサシステム |
DE102008045767A1 (de) | 2008-09-04 | 2010-03-11 | Continental Teves Ag & Co. Ohg | Mikroprozessor mit Pipelineblasen-Erfassungseinrichtung |
CN107038125B (zh) * | 2017-04-25 | 2020-11-24 | 上海兆芯集成电路有限公司 | 具有加速预取请求的独立流水线的处理器高速缓存 |
Family Cites Families (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3248707A (en) * | 1961-11-14 | 1966-04-26 | Ibm | Semi-asynchronous clock system |
US4025771A (en) * | 1974-03-25 | 1977-05-24 | Hughes Aircraft Company | Pipe line high speed signal processor |
US4090249A (en) * | 1976-11-26 | 1978-05-16 | International Business Machines Corporation | Apparatus for sorting records in overlap relation with record loading and extraction |
JPS5466048A (en) * | 1977-11-07 | 1979-05-28 | Hitachi Ltd | Information processor |
US4236206A (en) * | 1978-10-25 | 1980-11-25 | Digital Equipment Corporation | Central processor unit for executing instructions of variable length |
JPS5621242A (en) * | 1979-07-28 | 1981-02-27 | Fujitsu Ltd | Pipeline control method for computer operation |
US4438492A (en) * | 1980-08-01 | 1984-03-20 | Advanced Micro Devices, Inc. | Interruptable microprogram controller for microcomputer systems |
JPS58189739A (ja) * | 1982-04-30 | 1983-11-05 | Hitachi Ltd | デ−タ処理システム |
US4534009A (en) * | 1982-05-10 | 1985-08-06 | The United States Of America As Represented By The Secretary Of The Navy | Pipelined FFT processor |
US4498136A (en) * | 1982-12-15 | 1985-02-05 | Ibm Corporation | Interrupt processor |
US4594655A (en) * | 1983-03-14 | 1986-06-10 | International Business Machines Corporation | (k)-Instructions-at-a-time pipelined processor for parallel execution of inherently sequential instructions |
JPS59231652A (ja) * | 1983-06-13 | 1984-12-26 | Hitachi Ltd | メモリアクセス・オ−バラツプ検出方式 |
WO1985000453A1 (en) * | 1983-07-11 | 1985-01-31 | Prime Computer, Inc. | Data processing system |
US4571673A (en) * | 1983-09-29 | 1986-02-18 | Tandem Computers Incorporated | Enhanced CPU microbranching architecture |
US4586130A (en) * | 1983-10-03 | 1986-04-29 | Digital Equipment Corporation | Central processing unit for a digital computer |
BR8503913A (pt) * | 1984-08-18 | 1986-05-27 | Fujitsu Ltd | Sistema e processo de recuperacao de erros em um processador de dados do tipo de canalizacao tendo um dispositivo de memoria de controle e processo de recuperacao de erros em um processador de dados do tipo de canalizacao |
JPS61234436A (ja) * | 1985-04-10 | 1986-10-18 | Matsushita Electric Ind Co Ltd | マイクロプログラム制御装置 |
US4794517A (en) * | 1985-04-15 | 1988-12-27 | International Business Machines Corporation | Three phased pipelined signal processor |
US4701842A (en) * | 1985-10-04 | 1987-10-20 | International Business Machines Corporation | Method and apparatus for avoiding excessive delay in a pipelined processor during the execution of a microbranch instruction |
US4709324A (en) * | 1985-11-27 | 1987-11-24 | Motorola, Inc. | Data processor control unit having an interrupt service using instruction prefetch redirection |
US4794527A (en) * | 1986-01-29 | 1988-12-27 | Digital Equipment Corporation | Microprogrammed data processing system using latch circuits to access different control stores with the same instruction at different times |
JPS63141131A (ja) * | 1986-12-04 | 1988-06-13 | Toshiba Corp | パイプライン制御方式 |
-
1988
- 1988-07-20 US US07/221,988 patent/US5019967A/en not_active Expired - Lifetime
-
1989
- 1989-07-19 CA CA000606106A patent/CA1320275C/en not_active Expired - Fee Related
- 1989-07-20 AT AT89307344T patent/ATE128565T1/de not_active IP Right Cessation
- 1989-07-20 JP JP1188708A patent/JPH0774991B2/ja not_active Expired - Fee Related
- 1989-07-20 DE DE68924380T patent/DE68924380T2/de not_active Expired - Fee Related
- 1989-07-20 EP EP89307344A patent/EP0352103B1/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH0774991B2 (ja) | 1995-08-09 |
EP0352103A2 (de) | 1990-01-24 |
ATE128565T1 (de) | 1995-10-15 |
EP0352103A3 (de) | 1992-08-12 |
CA1320275C (en) | 1993-07-13 |
US5019967A (en) | 1991-05-28 |
EP0352103B1 (de) | 1995-09-27 |
DE68924380T2 (de) | 1996-06-13 |
JPH02155037A (ja) | 1990-06-14 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8328 | Change in the person/name/address of the agent |
Free format text: GRUENECKER, KINKELDEY, STOCKMAIR & SCHWANHAEUSSER, 80538 MUENCHEN |
|
8339 | Ceased/non-payment of the annual fee |