DE68921868D1 - Verfahren zur Herstellung einer Heterostruktur. - Google Patents
Verfahren zur Herstellung einer Heterostruktur.Info
- Publication number
- DE68921868D1 DE68921868D1 DE68921868T DE68921868T DE68921868D1 DE 68921868 D1 DE68921868 D1 DE 68921868D1 DE 68921868 T DE68921868 T DE 68921868T DE 68921868 T DE68921868 T DE 68921868T DE 68921868 D1 DE68921868 D1 DE 68921868D1
- Authority
- DE
- Germany
- Prior art keywords
- heterostructure
- production
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28518—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02455—Group 13/15 materials
- H01L21/02463—Arsenides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02513—Microstructure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02538—Group 13/15 materials
- H01L21/02546—Arsenides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02631—Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02658—Pretreatments
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/933—Germanium or silicon or Ge-Si on III-V
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/938—Lattice strain control or utilization
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Crystallography & Structural Chemistry (AREA)
- Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
- Recrystallisation Techniques (AREA)
- Electrodes Of Semiconductors (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63291101A JP2507888B2 (ja) | 1988-11-19 | 1988-11-19 | ヘテロ構造体の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE68921868D1 true DE68921868D1 (de) | 1995-04-27 |
DE68921868T2 DE68921868T2 (de) | 1995-09-07 |
Family
ID=17764466
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE68921868T Expired - Fee Related DE68921868T2 (de) | 1988-11-19 | 1989-11-20 | Verfahren zur Herstellung einer Heterostruktur. |
Country Status (4)
Country | Link |
---|---|
US (1) | US5066355A (de) |
EP (1) | EP0377954B1 (de) |
JP (1) | JP2507888B2 (de) |
DE (1) | DE68921868T2 (de) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2619611B2 (ja) * | 1993-05-31 | 1997-06-11 | 住友シチックス株式会社 | 単結晶の製造装置および製造方法 |
JP3500541B2 (ja) * | 1994-02-15 | 2004-02-23 | 富士通株式会社 | 単電子トンネル接合装置の製造方法 |
JP3062065B2 (ja) * | 1995-10-20 | 2000-07-10 | 日本電気株式会社 | 半導体装置の製造方法 |
EP1779855A1 (de) * | 2005-10-28 | 2007-05-02 | Abdula Kurkayev | Nanopartikel von heterokristallinen Mineralien und ihre Herstellung |
EP3063325B1 (de) * | 2013-10-31 | 2021-08-18 | Archer Daniels Midland Company | Verfahren zur bearbeitung von stoffen oder kleidungsstücken mit polysaccharidpartikeln |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3530011A (en) * | 1964-12-07 | 1970-09-22 | North American Rockwell | Process for epitaxially growing germanium on gallium arsenide |
FR2225207B1 (de) * | 1973-04-16 | 1978-04-21 | Ibm | |
US3929527A (en) * | 1974-06-11 | 1975-12-30 | Us Army | Molecular beam epitaxy of alternating metal-semiconductor films |
JPS5638054B2 (de) * | 1974-07-04 | 1981-09-03 | ||
US3963538A (en) * | 1974-12-17 | 1976-06-15 | International Business Machines Corporation | Two stage heteroepitaxial deposition process for GaP/Si |
JPS5543882A (en) * | 1978-09-22 | 1980-03-27 | Mitsubishi Monsanto Chem Co | Gaseous-phase growing of compound semiconductor epitaxial film |
JPS5748735A (en) * | 1980-09-08 | 1982-03-20 | Canon Inc | Manufacture of image forming member for electrophotography |
US4517047A (en) * | 1981-01-23 | 1985-05-14 | The United States Of America As Represented By The Secretary Of The Army | MBE growth technique for matching superlattices grown on GaAs substrates |
US4578127A (en) * | 1982-08-13 | 1986-03-25 | At&T Bell Laboratories | Method of making an improved group III-V semiconductor device utilizing a getter-smoothing layer |
US4575924A (en) * | 1984-07-02 | 1986-03-18 | Texas Instruments Incorporated | Process for fabricating quantum-well devices utilizing etch and refill techniques |
JPH0236059B2 (ja) * | 1984-07-16 | 1990-08-15 | Kogyo Gijutsuin | Kagobutsuhandotainoseichohoho |
US4870032A (en) * | 1987-01-14 | 1989-09-26 | American Telephone And Telegraph Company, At&T Bell Laboratories | Method of fabricating single crystal films of cubic group II fluorides on semiconductor componds by molecular beam epitaxy |
US4918031A (en) * | 1988-12-28 | 1990-04-17 | American Telephone And Telegraph Company,At&T Bell Laboratories | Processes depending on plasma generation using a helical resonator |
-
1988
- 1988-11-19 JP JP63291101A patent/JP2507888B2/ja not_active Expired - Lifetime
-
1989
- 1989-11-16 US US07/438,290 patent/US5066355A/en not_active Expired - Fee Related
- 1989-11-20 DE DE68921868T patent/DE68921868T2/de not_active Expired - Fee Related
- 1989-11-20 EP EP89312016A patent/EP0377954B1/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0377954A1 (de) | 1990-07-18 |
US5066355A (en) | 1991-11-19 |
JP2507888B2 (ja) | 1996-06-19 |
JPH02139918A (ja) | 1990-05-29 |
DE68921868T2 (de) | 1995-09-07 |
EP0377954B1 (de) | 1995-03-22 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |